參數(shù)資料
型號(hào)： 5962-9169201Q3C
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類(lèi)： ADC
英文描述： 2-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CQCC28
封裝： CERAMIC, LCC-28
文件頁(yè)數(shù)： 7/23頁(yè)
文件大小： 364K
代理商： 5962-9169201Q3C
MAX6953
2-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 7
Matrix LED Display Driver
______________________________________________________________________________________
15
set to an out-of-range address by writing data in the 0xF8
to 0xFF range, then address 0x80 is set instead (Table
17).
Table 18 shows the user-definable font pointer base
addresses.
Table 19 shows an example of data (characters 0, 1,
and 2) being stored in the first three user-defined font
locations, illustrating the orientation of the data bits.
Table 20 shows the six sequential write commands
required to set a MAX6953's font character RAM02 with
the data to display character 2 given in the font RAM
illustration above.
Multiplex Clock and Blink Timing
The OSC pin can be fitted with capacitor CSET to GND
(to use the internal RC multiplex oscillator), or driven by
an external clock. The multiplex clock frequency deter-
mines the multiplex scan rate and the blink timing. The
display scan rate (the frequency that the complete four-
digit display is updated) is calculated by dividing the
frequency at OSC by 5600. With OSC at 4MHz, each
digit row is enabled for 100s, and the display scan
rate is 714.29Hz.
The on-chip oscillator may be accurate enough for
applications using a single device. If an exact blink rate
is required, use an external clock ranging between
1MHz and 8MHz to drive OSC. The OSC inputs of mul-
tiple MAX6953s can be tied together to a common
external clock to make the devices blink at the same
rate. The relative blink phasing of multiple MAX6953s
can be synchronized by setting the T bit in the configu-
ration register for all the devices in quick succession
(Table 12).
Blink Output
The blink output pin indicates the blink phase, and is
high during the P0 period and low during the P1 period.
Blink phase status can also be read back as the P bit in
the configuration register (Table 14). Typical uses for
this output are:
To provide an interrupt to the processor so that seg-
ment data can be changed synchronous to the
blinking. For example, a clock application may have
colon segments blinking every second between
hours and minute digits, and the minute display is
best changed in step with the colon segments. Also,
if the rising edge of blink is detected, there is half a
blink period to change the P1 digit data. Similarly, if
the falling edge of blink is detected, the user has
half a blink period to change the P0 digit data.
If OSC is driven with an accurate frequency, blink
can be used as a seconds counter or similar.
Scan-Limit Register
The scan-limit register sets how many monocolor digits
are displayed, either two or four. A bicolor digit is con-
nected as two monocolor digits (Table 21).
ADDRESS CODE
(HEX)
REGISTER
DATA
I2C READ
OR WRITE
FUNCTION
0x05
0x00–0x7F
Read
Read 7-bit user-definable font data entry from current font
address. MSB of the register data is clear. Font address
pointer is incremented after the read.
0x05
0x00–0x7F
Write
Write 7-bit user-definable font data entry to current font
address. Font address pointer is incremented after the write.
0x05
0x80–0xFF
Write
Write font address pointer with the register data.
Table 16. Memory Mapping of User-Defined Font Register 0x05
FONT POINTER ADDRESS
ACTION
0x80 to 0xF6
Valid range to set the font address pointer. Pointer autoincrements after a font data read or
write, while pointer address remains in this range.
0xF7
Font address resets to 0x80 after a font data read or write to this pointer address.
0xF8 to 0xFF
Invalid range to set the font address pointer. Pointer is set to 0x80 if address.
Table 17. Font Pointer Address Behavior
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