參數(shù)資料
型號: 5962-9169201Q3C
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: 2-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CQCC28
封裝: CERAMIC, LCC-28
文件頁數(shù): 21/23頁
文件大小: 364K
代理商: 5962-9169201Q3C
MAX6953
2-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 7
Matrix LED Display Driver
_______________________________________________________________________________________
7
Bit Transfer
One data bit is transferred during each clock pulse.
The data on the SDA line must remain stable while SCL
is high (Figure 4).
Acknowledge
The acknowledge bit is a clocked 9th bit that the recipi-
ent uses to handshake receipt of each byte of data
(Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse, such that the SDA line is sta-
ble low during the high period of the clock pulse. When
the master is transmitting to the MAX6953, the
MAX6953 generates the acknowledge bit because the
MAX6953 is the recipient. When the MAX6953 is trans-
mitting to the master, the master generates the
acknowledge bit because the master is the recipient.
Slave Address
The MAX6953 has a 7-bit-long slave address (Figure
6). The eighth bit following the 7-bit slave address is
the R/W bit. It is low for a write command, high for a
read command.
The first 3 bits (MSBs) of the MAX6953 slave address
are always 101. Slave address bits A3, A2, A1, and A0
are selected by the address input pins AD1 and AD0.
These two input pins may be connected to GND, V+,
SDA, or SCL. The MAX6953 has 16 possible slave
addresses (Table 3) and therefore a maximum of 16
MAX6953 devices may share the same interface.
Message Format for Writing
A write to the MAX6953 comprises the transmission of
the MAX6953's slave address with the R/W bit set to
zero, followed by at least 1 byte of information. The first
byte of information is the command byte, which deter-
mines which register of the MAX6953 is to be written by
the next byte, if received. If a STOP condition is detect-
ed after the command byte is received, then the
MAX6953 takes no further action (Figure 7) beyond
storing the command byte.
Any bytes received after the command byte are data
bytes. The first data byte goes into the internal register of
the MAX6953 selected by the command byte (Figure 8).
If multiple data bytes are transmitted before a STOP
condition is detected, these bytes are generally stored
in subsequent MAX6953 internal registers because the
command byte address generally autoincrements
(Table 4) (Figure 9).
Message Format for Reading
The MAX6953 is read using the MAX6953's internally
stored command byte as address pointer, the same
way the stored command byte is used as address
pointer for a write. The pointer generally autoincre-
ments after each data byte is read using the same rules
as for a write (Table 4). Thus, a read is initiated by first
configuring the MAX6953's command byte by perform-
ing a write (Figure 7). The master can now read n con-
secutive bytes from the MAX6953, with the first data
byte being read from the register addressed by the ini-
tialized command byte (Figure 9). When performing
STOP
CONDITION
START
CONDITION
tBUF
tSU, STO
tHD, STA
REPEATED START
CONDITION
tSU, STA
tHD, DAT
tSU, DAT
tLOW
SDA
SCL
tHIGH
START
CONDITION
tHD, STA
tR
tF
Figure 2. 2-Wire Serial Interface Timing Details
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