參數(shù)資料
型號： 5962-8967401QX
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： ADC
英文描述： 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CDIP40
封裝： CERAMIC, DIP-40
文件頁數(shù)： 25/34頁
文件大?。?/td> 860K
代理商： 5962-8967401QX
MAX5580–MAX5585
Buffered, Fast-Settling, Quad,
12-/10-/8-Bit, Voltage-Output DACs
______________________________________________________________________________________
31
Applications Information
Unipolar Output
Figure 7 shows the unity-gain MAX5580 in a unipolar
output configuration. Table 23 lists the unipolar out-
put codes.
Bipolar Output
The MAX5580 outputs can be configured for bipolar
operation, as shown in Figure 8. The output voltage is
given by the following equation:
VOUT_ = VREF x (CODE - 2048) / 2048
where CODE represents the numeric value of the
DAC’s binary input code (0 to 4095 decimal). Table 24
shows digital codes and the corresponding output volt-
age for the circuit in Figure 8.
Configurable Output Gain
The MAX5581/MAX5583/MAX5585 have force-sense
outputs, which provide a direct connection to the invert-
ing terminal of the output op amp, yielding the most
flexibility. The force-sense output has the advantage
that specific gains can be set externally for a given
application. The gain error for the MAX5581/MAX5583/
MAX5585 is specified in a unity-gain configuration (op-
amp output and inverting terminals connected), and
additional gain error results from external resistor
tolerances. The force-sense DACs allow many useful
circuits to be created with only a few simple external
components.
An example of a custom, fixed gain using the
MAX5581’s force-sense output is shown in Figure 9. In
this example, the external reference is set to 1.25V, and
the gain is set to +1.1V/V with external discrete resis-
tors to provide an approximate 0 to 1.375V DAC output
voltage range.
VOUT = [(0.5 x VREF_ x CODE) / 4096] x [1 + (R2 / R1)]
where CODE represents the numeric value of the
DAC’s binary input code (0 to 4095 decimal).
In this example, R2 = 12k and R1 = 10k to set the
gain = 1.1V/V:
VOUT = [(0.5 x 1.25V x CODE) / 4096] x 2.2
Table 24. Bipolar Code Table (Gain = +1)
DAC CONTENTS
MSB
LSB
ANALOG OUTPUT
1111
+VREF (2047 / 2048)
1000
0000
0001
+VREF (1 / 2048)
1000
0000
0
0111
1111
-VREF (1 / 2048)
0000
0001
-VREF (2047 / 2048)
0000
-VREF (2048 / 2048) = -VREF
Figure 8. Bipolar Output Circuit
MAX5580
MAX5582
MAX5584
DAC_
REF
10k
V+
V-
VOUT_
MAX6126
MAX5581
DAC_
REF
OUT_
FB_
R2 = 12k
0.1%
25ppm
R1 = 10k
0.1%
25ppm
MAX6126
Figure 9. Configurable Output Gain
相關(guān)PDF資料
PDF描述
5962-8967402QX 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CDIP40
5962-8967402XX 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CQCC44
5962-8967601QX 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CDIP40
5962-8967601QX 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CDIP40
5962-8967601XX 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CQCC44
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