參數(shù)資料
型號: 5962-8768901VA
廠商: VISHAY SILICONIX
元件分類: 多路復用及模擬開關
英文描述: 8-CHANNEL, SGL ENDED MULTIPLEXER, CDIP18
封裝: CERAMIC, DIP-18
文件頁數(shù): 1/12頁
文件大?。?/td> 170K
代理商: 5962-8768901VA
Vishay Siliconix
DG528, DG529
Document Number: 70068
S11-1029–Rev. D, 23-May-11
www.vishay.com
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Latchable Single 8-Ch/Differential 4-Ch Analog Multiplexers
FEATURES
Low RDS(on): 270
44 V Power Supply Rating
On-Board Address Latches
Break-Before-Make
Low Leakage - ID(on): 30 pA
BENEFITS
Improved System Accuracy
Microporcessor Bus Compatible
Easily Interfaced
Reduced Crosstalk
APPLICATIONS
Data Acquisition Systems
Automatic Test Equipment
Avionics and Military Systems
Medical Instrumentation
DESCRIPTION
The DG528 is an 8-channel single-ended analog multiplexer
designed to connect one of eight inputs to a common output
as determined by a 3-bit binary address (A0, A1, A2). DG529,
a 4-channel dual analog multiplexer, is designed to connect
one of four differential inputs to a common differential output
as determined by its 2-bit binary address (A0, A1) logic.
These analog multiplexers have on-chip address and control
latches to simplify design in microprocessor based applica-
tions. Break-before-make switching action protects against
momentary shorting of the input signals. The DG528/529 are
built on the improved PLUS-40 CMOS process. A buried
layer prevents latchup.
The on chip TTL-compatible address latches simplify digital
interface design and reduce board space in data acquisition
systems, process controls, avionics, and ATE.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
WR
D
RS
S8
A0
A1
EN
A2
V-
GND
S1
V+
S2
S5
S3
S6
S4
S7
Dual-In-Line
Decoders/Drivers
1
2
3
4
5
6
7
8
18
17
16
15
14
13
12
11
Top View
91
0
Latches
EN
A2
V
GND
S1
V+
S2
S5
S3
S6
PLCC
14
15
16
17
18
8
7
6
5
4
1
2
319
20
11
10
913
12
Top View
4
D
NC
8
7
A
WR
NC
RS
A
Latches
Decoders/Drivers
0
1
S
DG528
±
WR
Da
RS
Db
A0
A1
EN
GND
V-
V+
S1a
S1b
S2a
S2b
S3a
S3b
S4a
S4b
Dual-In-Line
Decoders/Drivers
1
2
3
4
5
6
7
8
18
17
16
15
14
13
12
11
Top View
910
Latches
DG529
相關PDF資料
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5962-87700012A PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, CQCC20
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