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參數(shù)資料
| 型號： | 5962-0720801VXC |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP84 |
| 封裝： | CERAMIC, CFP-84 |
| 文件頁數(shù)： | 11/20頁 |
| 文件大?。?/td> | 681K |
| 代理商： | 5962-0720801VXC |
www.ti.com
DEFINITION OF SPECIFICATIONS
SNR + 10log10
P
S
P
N
(1)
SINAD + 10log10
P
S
P
N ) PD
(2)
THD + 10log10
P
S
P
D
(3)
SGLS378 – MARCH 2008
Temperature Drift
Temperature drift (with respect to gain error and
Analog Bandwidth
offset error) specifies the change from the value at
The analog input frequency at which the power of the
the nominal temperature to the value at TMIN or TMAX.
fundamental is reduced by 3 dB with respect to the
It is computed as the maximum variation the
low-frequency value
parameters over the whole temperature range divided
by TMIN – TMAX.
Aperture Delay
The delay in time between the rising edge of the input
Signal-to-Noise Ratio (SNR)
sampling clock and the actual time at which the
SNR is the ratio of the power of the fundamental (PS)
sampling occurs
to the noise floor power (PN), excluding the power at
dc and in the first five harmonics.
Aperture Uncertainty (Jitter)
The sample-to-sample variation in aperture delay
Clock Pulse Duration/Duty Cycle
The duty cycle of a clock signal is the ratio of the time
SNR is given either in units of dBc (dB to carrier)
the clock signal remains at a logic high (clock pulse
when the absolute power of the fundamental is used
duration) to the period of the clock signal. Duty cycle
as the reference, or dBFS (dB to full scale) when the
is typically expressed as a percentage. A perfect
power of the fundamental is extrapolated to the
differential sine wave clock results in a 50% duty
converter’s full-scale range.
cycle.
Signal-to-Noise and Distortion (SINAD)
Maximum Conversion Rate
SINAD is the ratio of the power of the fundamental
The maximum sampling rate at which certified
(PS) to the power of all the other spectral components
operation is given. All parametric testing is performed
including noise (PN) and distortion (PD), but excluding
at this sampling rate unless otherwise noted.
dc.
Minimum Conversion Rate
The minimum sampling rate at which the ADC
functions
Differential Nonlinearity (DNL)
SINAD is given either in units of dBc (dB to carrier)
An ideal ADC exhibits code transitions at analog input
when the absolute power of the fundamental is used
values spaced exactly 1 LSB apart. DNL is the
as the reference, or dBFS (dB to Full Scale) when the
deviation of any single step from this ideal value,
power of the fundamental is extrapolated to the
measured in units of LSB.
converter’s full-scale range.
Integral Nonlinearity (INL)
Effective Resolution Bandwidth
INL is the deviation of the ADC transfer function from
The highest input frequency where the SNR (dB) is
a best-fit line determined by a least-squares curve fit
dropped by 3 dB for a full-scale input amplitude.
of that transfer function. The INL at each analog input
Total Harmonic Distortion (THD)
value is the difference between the actual transfer
THD is the ratio of the power of the fundamental (PS)
function and this best-fit line, measured in units of
to the power of the first five harmonics (PD).
LSB.
Gain Error
Gain error is the deviation of the ADC actual input
full-scale range from its ideal value. Gain error is
THD is typically given in units of dBc (dB to carrier).
given as a percentage of the ideal input full-scale
range.
Two-Tone Intermodulation Distortion
IMD3 is the ratio of the power of the fundamental (at
Offset Error
frequencies f1, f2) to the power of the worst spectral
Offset error is the deviation of output code from
component at either frequency 2f1 – f2 or 2f2 – f1).
mid-code
when
both
inputs
are
tied
to
IMD3 is either given in units of dBc (dB to carrier)
common-mode.
when the absolute power of the fundamental is used
as the reference, or dBFS (dB to full scale) when the
power of the fundamental is extrapolated to the
converter’s full-scale range.
Copyright 2008, Texas Instruments Incorporated
19
Product Folder Link(s) :ADS5463-SP
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