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參數(shù)資料
| 型號： | 5241 |
| 元件分類： | 數(shù)字電位計(jì) |
| 英文描述： | Quad Digitally Programmable Potentiometers (DPP⑩) with 64 Taps and 2-wire Interface |
| 中文描述： | 四數(shù)字可編程電位計(jì)（民進(jìn)黨⑩）與64個(gè)龍頭和2線接口 |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 111K |
| 代理商： | 5241 |
2
CAT5241
Document No. 2011, Rev. J
PIN DESCRIPTION
Pin
(SOIC)
Name
Function
1
R
W0
Wiper Terminal for Potentiometer 0
2
R
L0
Low Reference Terminal for Potentiometer 0
3
R
H0
High Reference Terminal for Potentiometer 0
4
A0
Device Address, LSB
5
A2
Device Address
6
R
W1
Wiper Terminal for Potentiometer 1
7
R
L1
Low Reference Terminal for Potentiometer 1
8
R
H1
High Reference Terminal for Potentiometer 1
9
SDA
Serial Data Input/Output
10
GND
Ground
11
R
H2
High Reference Terminal for Potentiometer 2
12
R
L2
Low Reference Terminal for Potentiometer 2
13
R
W2
Wiper Terminal for Potentiometer 2
14
SCL
Bus Serial Clock
15
A3
Device Address
16
A1
Device Address
17
R
H3
High Reference Terminal for Potentiometer 3
18
R
L3
Low Reference Terminal for Potentiometer 3
19
R
W3
Wiper Terminal for Potentiometer 3
20
VCC
Supply Voltage
PIN DESCRIPTIONS
SCL:
The CAT5241 serial clock input pin is used to clock
all data transfers into or out of the device.
Serial Clock
SDA:
The CAT5241 bidirectional serial data pin is used
to transfer data into and out of the device. The
SDA pin is an open drain output and can be wire-
or'd with the other open drain or open collector
outputs.
Serial Data
A0, A1, A2, A3:
Device Address Inputs
These inputs set the device address when ad-
dressing multiple devices. A total of sixteen
devices can be addressed on a single bus. A
match in the slave address must be made with the
address input in order to initiate communication
with the CAT5241.
R
H
, R
L
:
Resistor End Points
The four sets of R
H
and R
L
pins are equivalent to
the terminal connections on a mechanical potenti-
ometer.
R
W
:
The four R
W
pins are equivalent to the wiper
terminal of a mechanical potentiometer.
Wiper
DEVICE OPERATION
The CAT5241 is four resistor arrays integrated with 2-
wire serial interface logic, four 6-bit wiper control registers
and sixteen 6-bit, non-volatile memory data registers.
Each resistor array contains 63 separate resistive
elements connected in series. The physical ends of
each array are equivalent to the fixed terminals of a
mechanical potentiometer (R
H
and R
L
). R
H
and R
L
are
symmetrical and may be interchanged. The tap positions
between and at the ends of the series resistors are
connected to the output wiper terminals (R
W
) by a
CMOS transistor switch. Only one tap point for each
potentiometer is connected to its wiper terminal at a time
and is determined by the value of the wiper control
register. Data can be read or written to the wiper control
registers or the non-volatile memory data registers via
the 2-wire bus. Additional instructions allow data to be
transferred between the wiper control registers and
each respective potentiometer's non-volatile data
registers. Also, the device can be instructed to operate
in an "increment/decrement" mode.
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