參數(shù)資料
型號(hào): 4250
英文描述: Low-Cost, 2.7V to 5.5V Temperature Switches in a SOT23
中文描述: 4250組數(shù)據(jù)表數(shù)據(jù)表652K/NOV.30.97
文件頁數(shù): 4/59頁
文件大小: 652K
代理商: 4250
3
MITSUBISHI MICROCOMPUTERS
4250 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
PERFORMANCE OVERVIEW
Parameter
Number of basic instructions
Minimum instruction execution time
Function
70
1.0
μ
s (at 4.0 MHz system clock frequency) (Refer to the electrical characteristics because
the minimum instruction execution time depends on the supply voltage.)
2048 words
9 bits
64 words
4 bits
Four independent I/O ports; ports D
2
and D
3
are also used as ports C and K, respectively.
4-bit I/O port
1-bit I/O port; port C is also used as port D
2
.
1-bit I/O port; port K is also used as port D
3
.
2-bit I/O port
4-bit I/O port; ports G
0
and G
1
are also used as pins INT and T
OUT
.
Interrupt input; INT pin is also used as port G
0
.
Timer output; T
OUT
pin is also used as port G
1
.
8-bit timer with a reload register
2 (one for external and one for timer)
1 level
CR oscillation circuit (a capacitor and a resistor connected externally)
Frequency error:
±
17 %
(V
DD
= 5 V
±
10 %, V
DD
= 3 V
±
10 %, the error of the external capacitor and resistor excluded)
4 levels
CMOS silicon gate
20-pin plastic molded SOP (20P2N-A)
–20
°
C to 85
°
C
2.2 V to 5.5 V (Refer to the electrical characteristics because the supply voltage depends on
the system clock frequency.)
1.5 mA
(at 4.0 MHz system clock frequency, V
DD
= 5 V, output transistors in the cut-off state)
0.1
μ
A (at room temperature, V
DD
= 5 V, output transistors in the cut-off state)
Memory sizes
Input/Output
ports
Timer
Interrupt
Oscillation circuit
Subroutine nesting
Device structure
Package
Operating temperature range
Supply voltage
Power
dissipation
(typical value)
ROM
RAM
D
0
–D
3
S
0
–S
3
C
K
F
0
, F
1
G
0
–G
3
INT
T
OUT
Timer 1
Sources
Nesting
Active mode
RAM back-up mode
M34250M2/
E2
I/O
I/O
I/O
I/O
I/O
I/O
Input
Output
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