參數資料
型號: 4040FI5
元件分類: 復位半導體
英文描述: 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit
中文描述: 4040架F15(3x7683)前端的數據資料|射頻調諧器模塊:
文件頁數: 6/17頁
文件大小: 725K
代理商: 4040FI5
4040 FI5 RF F
RONT
E
ND
M
ODULE
(3
X
7683, 3
X
7748)
A
DVANCE
D
ATA
S
HEET
M
IXED
D
IGITAL AND
A
NALOG
TV
AND
ATSC A
PPLICATIONS
3X 7683 ED Revision: 07
May 00
Page 6 of 17
7683ED07.doc
P
P
ARAMETER
T
EST
C
ONDITIONS
M
IN
T
YP
M
AX
U
NIT
Intermodulation
Composite triple
beat
60
dB
Composite second
order beat
60
dB
IP3 (two tone)
With a fully loaded multi-tone signal
generator (129 channels), with carrier
levels at +0 dBmV, and with AGC set
for maximum gain (= 4V), distortion
levels shall not exceed the following
limits.
90
dB
μ
V
1 dB Compression point
VHF Low, VHF High,
UHF
Measured with AGC = 4V (= maximum
gain)
80
dB
μ
V
8
TEST CIRCUITS
IF1
IF2
T1
IF Out
75 Ohm
R1 680R 1%
R2 680R 1%
Figure 4
Test Circuit
Dummy attenuation: 22.6 dB
T1 = RF – Transformer
W – Ratio = 1:4 (IF – in 4 / IF – out 1)
Type: MCL T4-1 or equivalent
9
OUTPUT PARAMETERS
9.1
VIDEO OUTPUT
Output signal type:
CVBS
Conditions:
Antenna input level 66 dB
μ
V
12.5% Residual carrier
Table 4
Video Output
P
ARAMETER
T
EST
C
ONDITIONS
M
IN
T
YP
M
AX
U
NIT
CVBS Output level
DC Coupled
0.8
1
1.2
Vp-p
Load impedance
75
Video S/N,
(unweighted, flat field
[ 0 IRE])
VHF
46
dB
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