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參數(shù)資料
| 型號： | 4040FI5 |
| 元件分類： | 復位半導體 |
| 英文描述： | 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit |
| 中文描述： | 4040架F15（3x7683）前端的數(shù)據(jù)資料|射頻調諧器模塊： |
| 文件頁數(shù)： | 2/17頁 |
| 文件大小： | 725K |
| 代理商： | 4040FI5 |
4040 FI5 RF F
RONT
E
ND
M
ODULE
(3
X
7683, 3
X
7748)
A
DVANCE
D
ATA
S
HEET
M
IXED
D
IGITAL AND
A
NALOG
TV
AND
ATSC A
PPLICATIONS
3X 7683 ED Revision: 07
May 00
Page 2 of 17
7683ED07.doc
P
automatic gain control (AGC) input at pin 5 allows for external control of the output
signal amplitude. This tuner covers a frequency range of 50 MHz to 860 MHz with a
channel bandwidth of 6 MHz.
The standard for analog TV reception is NTSC M/N. The front end includes a hyper-
band tuner that covers the frequency range of 50 MHz to 860 MHz and an IF part
with SAW filter, IF amplifier, and video and sound demodulators. The audio
frequency (AF) and composite video broadcast signal (CVBS) signals are available
at the audio and video output pins, respectively. A video buffer is built in for direct
connection to a 75
input.
For both digital and analog applications, the reception frequency range is divided
into VHF low, VHF high and UHF. Band selection and tuning are done completely via
the I2C-bus. A digital automatic frequency control (AFC) function can be
implemented because the AFC voltage generated by the IF demodulator is fed to an
integrated A/D converter in the phase-locked loop (PLL) IC and is readable via the
I2C bus.
A DC/DC converter for 33V generation is built in so that only a single supply voltage
of 5V is required.
4
MECHANICAL SPECIFICATIONS
4.1
MECHANICAL DRAWING
Figure 2
Mechanical Drawing 3x7683
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