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參數(shù)資料
| 型號： | 403GCX-3JC80C2A |
| 元件分類： | 復(fù)位半導(dǎo)體 |
| 英文描述： | 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit |
| 中文描述： | 32位微處理器 |
| 文件頁數(shù)： | 22/48頁 |
| 文件大?。?/td> | 768K |
| 代理商： | 403GCX-3JC80C2A |
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IBM PowerPC 403GC
22
DC Specifications
Notes:
1. V
IVR
is the interface voltage reference to which the IVR pin is tied to select either a 3.3V or 5V interface. For
additional information, see "Recommended Connections," on page 21.
2. The 403GC drives its outputs to the level of V
DD
and, when not driving, the 403GC outputs can be pulled up to 5V
by other devices in a system if the 403GC IVR pin has been tied to 5V properly.
3. I
CC Max
is measured at Tm
C
= 85
°
C
,
worst-case recommended operating conditions for frequency and voltage as
specified in Table 9 on page 21, and a capacitive load of 50 pF.
Note:
1. C
Out
is specified as the load capacitance of a floating output in high impedance.
AC Specifications
Clock timing and switching characteristics are specified in accordance with
recommended operating conditions in Table 9. AC specifications are
characterized at V
DD
= 3.14V and T
J
= 85°C with the 50pF test load shown in
the figure at right. Derating of outputs for capacitive loading is shown in the
figure "Output Derating for Capacitance and Voltage," on page 28.
Table 10. 403GC DC Characteristics
Symbol
Parameter
Min
Max
Units
V
IL
Input low voltage (except for SysClk)
GND - 0.1
0.8
V
V
ILC
Input low voltage for SysClk
GND - 0.1
0.8
V
V
IH
Input high voltage (except for SysClk)
1
Input high voltage for SysClk
1
2.0
V
IVR
+ 0.1
V
V
IHC
2.0
V
IVR
+ 0.1
V
V
OL
Output low voltage
0.4
V
V
OH
Output high voltage
2.4
V
DD
V
I
OH
Output high current
2
mA
I
OL
Output low current
4
mA
I
LI
Input leakage current
50
μ
A
I
LO
Output leakage current
10
μ
A
I
CC
Supply current (I
CC Max
at F
C
of 25 MHz)
2
Supply current (I
CC Max
at F
C
of 33 MHz)
2
Supply current (I
CC Max
at F
C
of 40 MHz)
2, 3
200
mA
260
mA
315
mA
Table 11. 403GC I/O Capacitance
Symbol
Parameter
Min
Max
Units
C
IN
Input capacitance (except for SysClk)
5
pF
C
INC
Input capacitance for SysClk
Output capacitance
1
25
pF
C
OUT
7
pF
C
I/O
I/O pin capacitance
8
pF
Output
Pin
C
L
C
L
= 50 pf for all signals
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