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參數(shù)資料
| 型號： | 3820 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數(shù)： | 25/66頁 |
| 文件大?。?/td> | 1093K |
| 代理商： | 3820 |
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25
MITSUBISHI MICROCOMPUTERS
3820 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
SERIAL I/O1
Serial I/O1 can be used as either clock synchronous or asynchro-
nous (UART) serial I/O1. A dedicated timer (baud rate generator)
is also provided for baud rate generation.
Clock Synchronous Serial I/O1 Mode
Clock synchronous serial I/O1 mode can be selected by setting
the mode selection bit of the serial I/O1 control register to “1”.
For clock synchronous serial I/O1, the transmitter and the receiver
must use the same clock. If an internal clock is used, transfer is
started by a write signal to the TB/RB (address 0018
16
).
Fig. 15 Block diagram of clock synchronous serial I/O1
Fig. 16 Operation of clock synchronous serial I/O1 function
1/4
X
IN
f(X
IN
)
1/4
F/F
P4
6
/S
CLK1
Serial I/O1 status register
Serial I/O1 control register
P4
7
/S
RDY1
P4
4
/R
X
D
P4
5
/T
X
D
Receive buffer register (RB)
Address 0018
16
Receive shift register
Receive buffer full flag (RBF)
Serial I/O receive interrupt request (RI)
Clock control circuit
Shift clock
Serial I/O1 synchronization
clock selection bit
Frequency division ratio 1/(n+1)
Baud rate generator
Address 001C
16
BRG count source selection bit
Clock control circuit
Falling-edge detector
Data bus
Address 0018
16
Shift clock
Transmit shift register shift completion flag (TSC)
Transmit interrupt source selection bit
Transmit buffer empty flag (TBE)
Address 0019
16
Serial I/O transmit interrupt request (TI)
Data bus
Address 001A
16
Transmit shift register
Transmit buffer register (TB)
D
7
D
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
0
D
1
D
2
D
3
D
4
D
5
D
6
RBF = 1
TSC = 1
Overrun error (OE)
detection
TBE = 0
TBE = 1
TSC = 0
Transfer shift clock
(1/2 to 1/2048 of the internal
clock, or an external clock)
Serial output TxD
Serial input RxD
Write signal to receive/transmit
buffer register (address 0018
16
)
Notes 1 : The serial I/O1 transmit interrupt (TI) can be selected to occur either when the transmit buffer register has emptied (TBE=1)
or after the transmit shift operation has ended (TSC=1), by setting the transmit interrupt source selection bit (TIC) of the
serial I/O1 control register.
2 : If data is written to the transmit buffer register when TSC=0, the transmit clock is generated continuously and serial data is
output continuously from the TxD pin.
3 : The serial I/O1 receive interrupt (RI) is set when the receive buffer full flag (RBF) becomes “1” .
Receive enable signal
S
RDY1
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