- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄358635 > 3820 (Mitsubishi Electric Corporation) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER PDF資料下載
參數(shù)資料
| 型號： | 3820 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁數(shù)： | 18/66頁 |
| 文件大?。?/td> | 1093K |
| 代理商： | 3820 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當(dāng)前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁
18
MITSUBISHI MICROCOMPUTERS
3820 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
INTERRUPTS
I
nterrupts occur by sixteen sources: seven external, eight internal,
and one software.
Interrupt Control
Each interrupt is controlled by an interrupt request bit, an interrupt
enable bit, and the interrupt disable flag except for the software in-
terrupt set by the BRK instruction. An interrupt occurs if the corre-
sponding interrupt request and enable bits are “1” and the inter-
rupt disable flag is “0”.
Interrupt enable bits can be set or cleared by software.
Interrupt request bits can be cleared by software, but cannot be
set by software.
The BRK instruction cannot be disabled with any flag or bit. The I
(interrupt disable) flag disables all interrupts except the BRK in-
struction interrupt.
Interrupt Operation
When an interrupt is received, the contents of the program counter
and processor status register are automatically stored into the
stack. The interrupt disable flag is set to inhibit other interrupts
from interfering.The corresponding interrupt request bit is cleared
and the interrupt jump destination address is read from the vector
table into the program counter.
Notes on Use
When the active edge of an external interrupt (INT
0
–INT
3
, CNTR
0
,
or CNTR
1
) is changed, the corresponding interrupt request bit
may also be set. Therefore, please take following sequence;
(1) Disable the external interrupt which is selected.
(2) Change the active edge selection.
(3) Clear the interrupt request bit which is selected to “0”.
(4) Enable the external interrupt which is selected.
Interrupt Source
Reset (Note 2)
INT
0
INT
1
Serial I/O1
receive
Serial I/O1
transmit
Timer X
Timer Y
Timer 2
Timer 3
CNTR
0
CNTR
1
Timer 1
INT
2
INT
3
Key input
(Key-on wake up)
Serial I/O2
BRK instruction
Low
FFFC
16
FFFA
16
FFF8
16
FFF6
16
FFF4
16
FFF2
16
FFF0
16
FFEE
16
FFEC
16
FFEA
16
FFE8
16
FFE6
16
FFE4
16
FFE2
16
FFE0
16
FFDE
16
FFDC
16
High
FFFD
16
FFFB
16
FFF9
16
FFF7
16
FFF5
16
FFF3
16
FFF1
16
FFEF
16
FFED
16
FFEB
16
FFE9
16
FFE7
16
FFE5
16
FFE3
16
FFE1
16
FFDF
16
FFDD
16
Table 1. Interrupt vector addresses and priority
Priority
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Interrupt Request
Generating Conditions
At reset
At detection of either rising or
falling edge of INT
0
input
At detection of either rising or
falling edge of INT
1
input
At completion of serial I/O1
data reception
At completion of serial I/O1
transmit shift or when transmit
buffer register is empty
At timer X underflow
At timer Y underflow
At timer 2 underflow
At timer 3 underflow
At detection of either rising or
falling edge of CNTR
0
input
At detection of either rising or
falling edge of CNTR
1
input
At timer 1 underflow
At detection of either rising or
falling edge of INT
2
input
At detection of either rising or
falling edge of INT
3
input
At falling of conjunction of input
level for port P2 (at input mode)
At completion of serial I/O2
data transmission or reception
At BRK instruction execution
Remarks
Non-maskable
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
Valid when serial I/O1 is selected
Valid when serial I/O1 is selected
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
External interrupt
(valid when an “L” level is applied)
Valid when serial I/O2 is selected
Non-maskable software interrupt
Vector Addresses (Note 1)
Notes
1
: Vector addresses contain interrupt jump destination addresses.
2
: Reset function in the same way as an interrupt with the highest priority.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 383-2UBC | 5.0mm Round Type LED Lamps |
| 383-2UBC-C470 | 5.0mm Round Type LED Lamps |
| 3832 | 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit |
| 3842B | HIGH-PERFORMANCE CURRENT-MODE PWM CONTROLLERS |
| 3842GM | GREEN MODE PWM CONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 3820 AS | 制造商:Ck Tools 功能描述:Bulk |
| 3820_03 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:8-BIT SINGLE-CHIP MICROCOMPUTER |
| 382000 | 功能描述:測試引線 VOLTAGE TEST LEADS W/ALLIGATOR CLIPS RoHS:否 制造商:Pomona Electronics 設(shè)備類型:Patch Cords 連接器類型:Banana plug (stackable) on both ends 長度:60 in 顏色:Black |
| 38200-0000-00-1 | 制造商:Kontron 功能描述:ETXEXPRESS EVAL TYPE 3 BOARD W/ GIGE - Boxed Product (Development Kits) |
| 382-0004 | 功能描述:螺絲刀、螺母起子和套筒扳手 KNURLED NUT DRIVER TOOL 4mm RoHS:否 制造商:Wiha 產(chǎn)品: 類型:Wiha Magic Ring Ball End Hex Keys 大小: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。