參數(shù)資料
型號(hào): 2N7002-G
廠商: SUPERTEX INC
元件分類: 小信號(hào)晶體管
英文描述: N-Channel Enhancement-Mode Vertical DMOS FETs
中文描述: 115 mA, 60 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, TO-236AB
封裝: GREEN PACKAGE-3
文件頁(yè)數(shù): 2/5頁(yè)
文件大小: 556K
代理商: 2N7002-G
2
2N7002
Electrical Characteristics
(T
A
=25°C unless otherwise specified)
Symbol
Parameter
BV
DSS
V
GS(th)
V
GS(th)
I
GSS
Min
60
1.0
-
-
-
Typ
-
-
-
-
-
Max
-
2.5
-5.5
±100
1.0
Units
V
V
mV/
O
C
nA
Conditions
V
GS
= 0V, I
D
= 10μA
V
GS
= V
DS
, I
D
= 250μA
V
GS
= V
DS
, I
D
= 250μA
V
GS
= ±20V, V
DS
= 0V
V
GS
= 0V, V
DS
= Max rating
V
GS
= 0V, V
DS
= 0.8Max rating,
T
A
= 125
O
C
V
GS
= 10V, V
DS
= 25V
V
GS
= 5.0V, I
D
= 50mA
V
GS
= 10V, I
D
= 500mA
V
GS
= 10V, I
D
= 500mA
V
DS
= 25V, I
D
= 500mA
Drain-to-source breakdown voltage
Gate threshold voltage
Change in V
GS(th)
with temperature
Gate body leakage current
I
DSS
Zero gate voltage drain current
μA
-
-
500
I
D(ON)
ON-state drain current
500
-
-
-
80
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
mA
R
DS(ON)
Static drain-to-source
ON-state resistance
7.5
7.5
1.0
-
50
25
5
20
20
-
-
Ω
R
DS(ON)
G
FS
C
ISS
C
OSS
C
RSS
t
(ON)
t
(OFF)
V
SD
t
rr
Notes:
1.All D.C. parameters 100% tested at 25
O
C unless otherwise stated. (Pulse test: 300μs pulse, 2% duty cycle.)
2.All A.C. parameters sample tested.
Change in R
DS(ON)
with temperature
Forward transconductance
Input capacitance
Common source output capacitance
Reverse transfer capacitance
Turn-ON time
Turn-OFF time
Diode forward voltage drop
Reverse recovery time
%/
O
C
mmho
pF
V
GS
= 0V,
V
= 25V,
f = 1.0MHz
ns
V
DD
= 30V, I
D
= 200mA,
R
GEN
= 25
1.2
400
V
ns
V
GS
= 0V, I
SD
= 200mA
V
GS
= 0V, I
SD
= 800mA
Switching Waveforms and Test Circuit
10V
Thermal Characteristics
Device
Package
I
(continuous)
*
(mA)
115
I
(pulsed)
(mA)
800
Power Dissipation
@T
A
= 25
O
C
(W)
0.36
θ
jc
(
O
C/W)
θ
ja
(
O
C/W)
I
(mA)
*
I
(mA)
2N7002
Notes:
* I
D
(continuous) is limited by max rated T
J
.
TO-236AB
200
350
115
800
90%
10%
90%
90%
10%
10%
PULSE
GENERATOR
V
DD
R
L
OUTPUT
D.U.T.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
F
t
r
INPUT
INPUT
OUTPUT
V
DD
R
GEN
0V
0V
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