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參數(shù)資料
| 型號(hào)： | 2N2907AUB-TR |
| 廠商： | MICROSEMI CORP-LAWRENCE |
| 元件分類： | 小信號(hào)晶體管 |
| 英文描述： | 600 mA, 60 V, PNP, Si, SMALL SIGNAL TRANSISTOR |
| 封裝： | CERAMIC PACKAGE-4 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大?。?/td> | 100K |
| 代理商： | 2N2907AUB-TR |
TECHNICAL DATA SHEET
6 Lake Street, Lawrence, MA 01841
1-800-446-1158 / (978) 620-2600 / Fax: (978) 689-0803
Website: http: //www.microsemi.com
T4-LDS-0055 Rev. 4 (100247)
Page 4 of 6
NOTES:
Dimensions
1. Dimensions are in inches.
Symbol
Inches
Millimeters
Note
2. Millimeters are given for general information only.
Min
Max
Min
Max
3. Dimension CH controls the overall package thickness. When a
BL
.215
.225
5.46
5.71
window lid is used, dimension CH must increase by a minimum of
BL2
.225
5.71
.010 inch (0.254 mm) and a maximum of .040 inch (1.020 mm).
BW
.145
.155
3.68
3.93
4. The corner shape (square, notch, radius) may vary at the
BW2
.155
3.93
manufacturer's option, from that shown on the drawing.
CH
.061
.075
1.55
1.90
3
5. Dimensions LW2 minimum and L3 minimum and the appropriate
L3
.003
.007
0.08
0.18
5
castellation length define an unobstructed three-dimensional space
LH
.029
.042
0.74
1.07
traversing all of the ceramic layers in which a castellation was
LL1
.032
.048
0.81
1.22
designed. (Castellations are required on the bottom two layers,
LL2
.072
.088
1.83
2.23
optional on the top ceramic layer.) Dimension “LW2” maximum and
LS
.045
.055
1.14
1.39
“L3” maximum define the maximum width and depth of the
LW
.022
.028
0.56
0.71
castellation at any point on its surface. Measurement of these
LW2
.006
.022
0.15
0.56
5
dimensions may be made prior to solder dipping.
6. The co-planarity deviation of all terminal contact points, as defined
by the device seating plane, shall not exceed .006 inch (0.15mm) for
Pin no.
1
2
3
4
solder dipped leadless chip carriers.
Transistor
Collector
Emitter
Base
N/C
7. In accordance with ASME Y14.5M, diameters are equivalent to
φx
symbology.
FIGURE 2. Physical dimensions, surface mount (UA version)
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| 2N2907AUBTX | 制造商:TT Electronics / OPTEK Technology 功能描述:3 PIN, SMT PNP GENERAL PURPOSE TRANSISTOR 制造商:OPTEK TECHNOLOGY INC 功能描述:3 Pin, SMT PNP general purpose transistor |
| 2N2907AUBTXV | 制造商:TT Electronics / OPTEK Technology 功能描述:3 PIN, SMT PNP GENERAL PURPOSE TRANSISTOR 制造商:OPTEK TECHNOLOGY INC 功能描述:3 Pin, SMT PNP general purpose transistor |
| 2N2907-B | 功能描述:兩極晶體管 - BJT 600mA 60v RoHS:否 制造商:STMicroelectronics 配置: 晶體管極性:PNP 集電極—基極電壓 VCBO: 集電極—發(fā)射極最大電壓 VCEO:- 40 V 發(fā)射極 - 基極電壓 VEBO:- 6 V 集電極—射極飽和電壓: 最大直流電集電極電流: 增益帶寬產(chǎn)品fT: 直流集電極/Base Gain hfe Min:100 A 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PowerFLAT 2 x 2 |
| 2N2907-BP | 功能描述:兩極晶體管 - BJT 600mA 60v RoHS:否 制造商:STMicroelectronics 配置: 晶體管極性:PNP 集電極—基極電壓 VCBO: 集電極—發(fā)射極最大電壓 VCEO:- 40 V 發(fā)射極 - 基極電壓 VEBO:- 6 V 集電極—射極飽和電壓: 最大直流電集電極電流: 增益帶寬產(chǎn)品fT: 直流集電極/Base Gain hfe Min:100 A 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PowerFLAT 2 x 2 |
| 2N2907CSM | 制造商:SEME-LAB 制造商全稱:Seme LAB 功能描述:Bipolar PNP Device in a Hermetically sealed LCC1 |
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