參數(shù)資料
型號(hào)： 29LV650
廠商： Fujitsu Limited
英文描述： 64M (4M x 16) BIT
中文描述： 64M號(hào)（4米× 16）位
文件頁數(shù)： 27/57頁
文件大小： 625K
代理商： 29LV650
MBM29LV650UE/651UE-
90/12
27
*: Successive reads from the erasing or erase-suspend sector will cause DQ
2
to toggle. Reading from non-erase
suspend sector address will indicate logic “1” at the DQ
2
bit.
Data Protection
The MBM29LV650UE/651UE is designed to offer protection against accidental erasure or programming caused
by spurious system level signals that may exist during power transitions. During power up the devices
automatically reset the internal state machine in the Read mode. Also, with its control register architecture,
alteration of the memory contents only occurs after successful completion of specific multi-bus cycle command
sequences. The devices also incorporate several features to prevent inadvertent write cycles resulting form V
CC
power-up and power-down transitions or system noise.
Low V
CC
Write Inhibit
To avoid initiation of a write cycle during V
CC
power-up and power-down, a write cycle is locked out for V
CC
less
than V
LKO
(min). If V
CC
< V
LKO
, the command register is disabled and all internal program/erase circuits are
disabled. Under this condition the device will reset to the read mode. Subsequent writes will be ignored until the
V
CC
level is greater than V
LKO
. It is the users responsibility to ensure that the control pins are logically correct to
prevent unintentional writes when V
CC
is above V
LKO
(min).
If Embedded Erase Algorithm is interrupted, there is possibility that the erasing sector(s) cannot be used.
Write Pulse “Glitch” Protection
Noise pulses of less than 3 ns (typical) on OE, CE, or WE will not initiate a write cycle.
Logical Inhibit
Writing is inhibited by holding any one of OE = V
IL
, CE = V
IH
, or WE = V
IH
. To initiate a write, CE and WE must
be a logical zero while OE is a logical one.
Power-up Write Inhibit
Power-up of the devices with WE = CE = V
IL
and OE = V
IH
will not accept commands on the rising edge of WE.
The internal state machine is automatically reset to read mode on power-up.
Table 9 Toggle Bit Status
Mode
DQ
7
DQ
6
DQ
2
Program
DQ
7
Toggle
1
Erase
0
Toggle
Toggle *
Erase-Suspend Read
(Erase-Suspended Sector)
1
1
Toggle
Erase-Suspend Program
DQ
7
Toggle
1 *
相關(guān)PDF資料
PDF描述
29LV800BB-70 8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
29LV800BB-90 8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
29LV800BT-70 8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
29LV800BT-90 8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
29LV800BE 8M (1M x 8/512 K x 16) BIT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
29LV800BB-70 制造商:MCNIX 制造商全稱:Macronix International 功能描述:8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
29LV800BB-90 制造商:MCNIX 制造商全稱:Macronix International 功能描述:8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
29LV800BE 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M x 8/512 K x 16) BIT
29LV800BT-70 制造商:MCNIX 制造商全稱:Macronix International 功能描述:8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
29LV800BT-90 制造商:MCNIX 制造商全稱:Macronix International 功能描述:8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*