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參數(shù)資料
| 型號(hào)： | 24WC32 |
| 元件分類： | EEPROM |
| 英文描述： | 64K 8K x 8 Battery-Voltage CMOS E2PROM |
| 中文描述： | 64K的8K的× 8電池電壓的CMOS E2PROM的 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 74K |
| 代理商： | 24WC32 |
1
DOUT
ACK
SENSE AMPS
SHIFT REGISTERS
CONTROL
LOGIC
WORD ADDRESS
BUFFERS
START/STOP
LOGIC
STATE COUNTERS
SLAVE
ADDRESS
COMPARATORS
E
2
PROM
128/256 X 256
VCC
EXTERNAL LOAD
COLUMN
DECODERS
XDEC
DATA IN STORAGE
HIGH VOLTAGE/
TIMING CONTROL
VSS
WP
SCL
A0
A1
A2
SDA
128/256
256
VCC
WP
SCL
SDA
1
2
3
4
8
7
6
5
A0
A1
A2
VCC
WP
SCL
SDA
1
2
3
4
8
7
6
5
VSS
A0
A1
A2
VSS
DESCRIPTION
The CAT24WC32/64 is a 32K/64K-bit Serial CMOS
E
2
PROM internally organized as 4096/8192 words of 8
bits each. Catalyst’s advanced CMOS technology sub-
stantially reduces device power requirements. The
Preliminary
CAT24WC32/64
32K/64K-Bit I
2
C Serial CMOS E
2
PROM
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I
2
C Bus Protocol.
I
Zero Standby Current
I
Commercial, Industrial and Automotive
Temperature Ranges
I
Write Protection
– Entire Array Protected When WP at V
IH
I
1,000,000 Program/Erase Cycles
I
100 Year Data Retention
CAT24WC32/64 features a 32-byte page write buffer.
The device operates via the I
2
C bus serial interface and
is available in 8-pin DIP or 8-pin SOIC packages.
PIN CONFIGURATION
BLOCK DIAGRAM
PIN FUNCTIONS
Pin Name
Function
A0, A1, A2
Device Address Inputs
SDA
Serial Data/Address
SCL
Serial Clock
WP
Write Protect
V
CC
+1.8V to +6V Power Supply
V
SS
Ground
24WC32/64 F02
I
400 KHz I
2
C Bus Compatible*
1.8 to 6 Volt Read and Write Operation
I
Cascadable for up to Eight Devices
I
32-Byte Page Write Buffer
I
Self-Timed Write Cycle with Auto-Clear
I
8-Pin DIP or 8-Pin SOIC
I
Schmitt Trigger Inputs for Noise Protection
FEATURES
DIP Package (P)
SOIC Package (J,K)
24WC32/64 F01
1998 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc. No. 25053-00 2/98 S-1
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