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參數(shù)資料
| 型號(hào)： | 24LCS21 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 1K 2.5V Dual Mode I 2 C Serial EEPROM |
| 中文描述： | 一千2.5V的雙模式的I 2 C串行EEPROM |
| 文件頁(yè)數(shù)： | 10/12頁(yè) |
| 文件大?。?/td> | 91K |
| 代理商： | 24LCS21 |
24LCS21
DS21127B-page 10
1996 Microchip Technology Inc.
7.3
Sequential Read
Sequential reads are initiated in the same way as a
random read except that after the 24LCS21 transmits
the first data byte, the master issues an acknowledge
as opposed to a stop condition in a random read. This
directs the 24LCS21 to transmit the next sequentially
addressed 8-bit word (Figure 8-1).
To provide sequential reads the 24LCS21 contains an
internal address pointer which is incremented by one at
the completion of each operation. This address pointer
allows the entire memory contents to be serially read
during one operation.
7.4
Noise Protection
The 24LCS21 employs a V
CC
threshold detector circuit
which disables the internal erase/write logic if the V
CC
is below 1.5 volts at nominal conditions.
The SDA, SCL and VCLK inputs have Schmitt trigger
and filter circuits which suppress noise spikes to assure
proper device operation even on a noisy bus.
8.0
PIN DESCRIPTIONS
8.1
SDA
This pin is used to transfer addresses and data into and
out of the device, when the device is in the bi-directional
Mode. In the Transmit-Only Mode, which only allows
data to be read from the device, data is also transferred
on the SDA pin. This pin is an open drain terminal,
therefore the SDA bus requires a pullup resistor to V
CC
(typical 10 K
for 100 kHz, 1 K
for 400 kHz).
For normal data transfer in the bi-directional Mode,
SDA is allowed to change only during SCL low.
Changes during SCL high are reserved for indicating
the START and STOP conditions.
8.2
SCL
This pin is the clock input for the bi-directional Mode,
and is used to synchronize data transfer to and from the
device. It is also used as the signaling input to switch
the device from the Transmit Only Mode to the bi-direc-
tional Mode. It must remain high for the chip to continue
operation in the Transmit Only Mode.
8.3
VCLK
This pin is the clock input for the Transmit Only Mode
(DDC1). In the Transmit Only Mode, each bit is clocked
out on the rising edge of this signal. In the bi-directional
Mode, a high logic level is required on this pin to enable
write capability.
8.4
WP
This pin is used for flexible write protection of the
24LCS21. When the last memory location (7Fh) is
written with any data, this pin is enabled and
determines the write capability of the 24LCS21
(Figure 6-1).
The WP pin has an internal pull up resistor which will
allow write capability (assuming VCLK = 1) at all times
if this pin is floated.
FIGURE 8-1: SEQUENTIAL READ
A
C
K
P
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
CONTROL
BYTE
DATA n
DATA n+1
DATA n+2
DATA n+X
A
C
K
A
C
K
A
C
K
N
O
A
C
K
S
T
O
P
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| 24LCS52 | Connectors |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 24LCS21A/P | 功能描述:電可擦除可編程只讀存儲(chǔ)器 2.5V Dual Mode RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LCS21A/S | 制造商:Microchip Technology Inc 功能描述:1K 2.5V DUAL MODE SERIAL EEPRO - Gel-pak, waffle pack, wafer, diced wafer on film |
| 24LCS21A/SN | 功能描述:電可擦除可編程只讀存儲(chǔ)器 2.5V Dual Mode RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LCS21A/W | 制造商:Microchip Technology Inc 功能描述:1K 2.5V DUAL MODE SERIAL EEPROM WAFER - Gel-pak, waffle pack, wafer, diced wafer on film |
| 24LCS21A/WF | 制造商:Microchip Technology Inc 功能描述:1K 2.5V DUAL MODE SERIAL EEPRO - Gel-pak, waffle pack, wafer, diced wafer on film |
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