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| 型號： | 22152 |
| 元件分類： | SRAM |
| 英文描述： | 64K Nonvolatile SRAM |
| 中文描述： | 使用AMD的設(shè)備運行狀態(tài)位 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 127K |
| 代理商： | 22152 |
July 24, 2002
Using the Operation Status Bits in AMD Devices
3
S U P P L E M E N T
USING THE OPERATION STATUS BITS
The Operation Status Bits provided on AMD Flash devices
can be used for the following: (Using the RY/BY# pin as an
alternative to the Operation Status bits is also discussed.)
1.
Checking if the device has completed a Pro-
gram operation:
To determine if the Flash device
has completed a Program operation the system
may (a) poll DQ6 or (b) poll DQ7 or (c) check the RY/
BY# pin. DQ6 and DQ7 must always be polled in
conjunction with DQ5 (see Item 5, “Ensuring that the
Program/Erase operation has completed success-
fully”).
a. Polling DQ6:
Once the Flash device starts a Program opera-
tion, successively reading from any address will
show DQ6 to be toggling i.e. if DQ6 is a “1” in the
first Read cycle, it will be a “0” in the next. Once the
Program operation is completed, DQ6 stops tog-
gling and valid array data will be read in the next at-
tempt. Refer to Figure 3 for the polling sequence.
Note: Although DQ6 may be read from any ad-
dress, AMD recommends using a consistent ad-
dress throughout the polling sequence.
OR
b. Polling DQ7:
Once the Flash device starts a Program opera-
tion, reading the DQ7 Status Bit yields the com-
plement of the data last written to DQ7. Note that
DQ7 must be read from the location being pro-
grammed. Once the programming is complete,
DQ7 returns the true data last written to DQ7.
Refer to Figure 4 for the polling sequence.
OR
c. Check RY/BY# pin:
The RY/BY# pin will be “l(fā)ow” if the device has
started the Program operation, and “high” when
the operation is complete. The RY/BY# pin may
be tied to the interrupt of the microprocessor.
The microprocessor may then perform other
tasks after issuing the program command. The
RY/BY# pin will interrupt the microprocessor
when the operation is complete. In the absence
of a RY/BY# pin, the host system will have to rely
on polling the DQ6 or DQ7 Status Bits.
2.
Checking if the device has completed an Chip
Erase operation:
To determine if the Flash device
has completed a Chip Erase operation the system may
(a) poll DQ6, (b) poll DQ7 or (c) check the RY/BY# pin.
DQ6 and DQ7 must always be polled in conjunction
with DQ5 (see Item 5, “Ensuring that the Program/
Erase operation has completed successfully”).
a. Polling DQ6:
Once the Flash device starts a Chip Erase oper-
ation, successively reading from any address will
show DQ6 to be toggling. Once the Chip Erase
operation is completed, DQ6 stops toggling and
valid array data will be read on the next attempt.
OR
b. Polling DQ7:
Once the device begins a Chip Erase operation,
polling DQ7 at any address returns a “0”. When the
Chip Erase operation is complete, DQ7 returns a
“1”. Refer to Figure 5 for the polling sequence.
OR
c. Checking RY/BY# pin:
The RY/BY# pin will be “l(fā)ow” if the device has
started the Chip Erase operation, and “high”
when the operation is complete. The RY/BY# pin
may be tied to the interrupt of the microproces-
sor. The microprocessor may then perform other
tasks after issuing the erase command. The RY/
BY# pin will interrupt the microprocessor when
the operation is complete. The RY/BY# pin will
then interrupt the microprocessor when the op-
eration is completed. Note that some AMD de-
vices do not offer the RY/BY# pin, in which case
the host system will have to rely on polling the
DQ6 or DQ7 Status Bits.
3.
Checking if a the device has completed a Sector
Erase operation:
To determine if a particular sector
has completed the Erase operation the system will
have to poll (a) DQ7 or (b) DQ6 or (c) check the RY/
BY# pin. DQ6 and DQ7 must always be polled in
conjunction with DQ5 (see Item 5, “Ensuring that
the Program/Erase operation has completed
successfully”).
a. Polling DQ6:
Once the Flash device starts a Sector Erase oper-
ation, successively reading from any address will
show DQ6 to be toggling. Once the Sector Erase
operation is completed, DQ6 stops toggling and
valid array data will be read on the next attempt.
OR
b. Polling DQ7:
Once the device starts a Sector Erase operation,
reading DQ7 from an address within the sector
boundary returns a “0”. When the Sector Erase
is complete, DQ7 returns a “1”.
OR
c. Checking RY/BY# pin:
The RY/BY# pin will be “l(fā)ow” if the device has
started the Sector Erase operation, and “high”
when the operation is complete. The RY/BY# pin
may be tied to the interrupt of the microproces-
sor. The microprocessor may then perform other
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