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參數(shù)資料
| 型號(hào)： | 141540 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Monitor On-Screen Display CMOS |
| 中文描述： | 顯示器屏幕顯示的CMOS |
| 文件頁(yè)數(shù)： | 7/12頁(yè) |
| 文件大?。?/td> | 186K |
| 代理商： | 141540 |
MC141540
7
MOTOROLA
Display character
(when CH=16
0
2
14
15
13
12
11
10
9
8
7
6
5
3
1
Display character
when CH=34
when CH=22
22 lines
34 lines
when CH=25
Figure 6. Variable Character Height
An IBM PC program called “MOSD Font Editor” (Rev. 2.0)
was written for MC141540 editing purposes. This program
generates a set of S–Record or Binary record for the desired
display patterns to be masked onto the character ROM of the
MC141540.
In order to have better character display within windows, it
is suggested that the designed character font be placed in
the center of the 10 x 16 matrix with equal space on all four
sides. The character $00 is predefined for blank characters,
and the character $7F is predefined for full–filled characters.
In order to avoid submersion of displayed symbols or char-
acters into a background of comparable colors, a feature of
bordering which encircles all four sides, or shadowing which
encircles only the right and bottom sides of an individual dis-
play character, are provided. Figure 7 shows how a character
is jacketed differently. To make sure that a character is bor-
dered or shadowed correctly, at least one blank dot should
be reserved on each side of the character font.
Bordering
1
14
12
3
Shadowing
1
14
15
13
12
11
10
7
5
3
Figure 7. Character Bordering and Shadowing
Frame Format and Timing
Figure 8 illustrates the positions of all display characters
on the screen relative to the leading edge of horizontal and
vertical flyback signals. The shaded area indicates the area
outside the “safe viewing area” for the display characters.
Notice that there are two components in the equations stated
in Figure 8 for horizontal and vertical delays: fixed delays
from the leading edge of HFLB and VFLB signals, regardless
of the values of HORD and VERTD (47 dots + phase detec-
tion pulse width) and one H scan line for horizontal and verti-
cal delays, respectively; and variable delays determined by
the values of HORD and VERTD. Refer to
Frame Control
Registers Coln 9 and 10
for the definitions of VERTD and
HORD.
Phase detection pulse width is a function of the external
charge–up resistor, which is the 330 k
resistor in a series
with 2 k
to VCO pin in the Application Diagram. Dot fre-
quency is determined by the equation H freq x 320 For ex-
ample, dot frequency is 10.24 MHz if H freq is 32 kHz.
Hence, a dot equals 1/10.24
μ
s.
When double character width is selected for a row, only the
even–numbered characters will be displayed, as shown in
Row 2. Notice that the total number of horizontal scan lines in
the display frame is variable, depending on the chosen char-
acter height of each row. Care should be taken while config-
uring each row character height so that the last horizontal
scan line in the display frame always comes out before the
leading edge of VFLB of the next frame, to avoid wrapping
display characters of the last few rows in the current frame
into the next frame. The number of display dots in a horizon-
tal scan line is always fixed at 240, regardless of row charac-
ter width.
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