參數(shù)資料
型號(hào): μPD78P078Y
廠商: NEC Corp.
英文描述: 8 Bit Single Chip Microcontrollers(8位單片微控制器)
中文描述: 8位單片機(jī)微控制器(8位單片微控制器)
文件頁(yè)數(shù): 46/84頁(yè)
文件大?。?/td> 472K
代理商: ΜPD78P078Y
46
m
PD78P078Y
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
SCK0 cycle time
t
KCY4
2.7 V - V
DD
- 5.5 V
1600
ns
2.0 V - V
DD
<
2.7 V
3200
ns
4800
ns
SCK0 high-level width
t
KH4
2.7 V - V
DD
- 5.5 V
650
ns
2.0 V - V
DD
<
2.7 V
1300
ns
2100
ns
SCK0 low-level width
t
KL4
2.7 V - V
DD
- 5.5 V
800
ns
2.0 V - V
DD
<
2.7 V
1600
ns
2400
ns
SB0, SB1 setup time
(to SCK0
)
SB0, SB1 hold time
(from SCK0
)
SCK0
SB0, SB1
output delay time
t
SIK4
V
DD
= 2.0 to 5.5 V
100
ns
150
ns
t
KSI4
t
KCY4
/2
ns
t
KSO4
R = 1 k
W
,
C = 100 pF
Note
4.5 V - V
DD
- 5.5 V
0
300
ns
2.0 V - V
DD
< 4.5 V
0
500
ns
800
ns
SCK0 rise, fall time
t
R4
,
When using external device expansion
160
ns
t
F4
function
When not using external device
1000
ns
expansion function
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
SCK0 cycle time
t
KCY3
R = 1 k
W
,
C = 100 pF
Note
2.7 V - V
DD
- 5.5 V
1600
ns
2.0 V - V
DD
< 2.7 V
3200
ns
4800
ns
SCK0 high-level width
t
KH3
V
DD
= 2.7 to 5.5 V
t
KCY3
/2–160
ns
t
KCY3
/2–190
ns
SCK0 low-level width
t
KL3
V
DD
= 4.5 to 5.5 V
t
KCY3
/2–50
ns
t
KCY3
/2–100
ns
SB0, SB1 setup time
(to SCK0
)
t
SIK3
4.5 V - V
DD
- 5.5 V
300
ns
2.7 V - V
DD
< 4.5 V
350
ns
2.0 V - V
DD
< 2.7 V
400
ns
500
ns
SB0, SB1 hold time
(from SCK0
)
SCK0
SB0, SB1
output delay time
t
KSI3
600
ns
t
KSO3
0
300
ns
(iii) 2-wire serial I/O mode (SCK0 ··· internal clock output)
Note
R and C are the SCK0, SB0, SB1 output line load resistance and load capacitance.
(iv) 2-wire serial I/O mode (SCK0 ··· external clock input)
Note
R and C are the SB0, SB1 output line load resistance and load capacitance.
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