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CHAPTER 9 8-BIT TIMER/EVENT COUNTER
9.4.2 16-bit timer/event counter mode
When bit 2 (TMC12) of the 8-bit timer mode control register (TMC1) is set to 1, the 16-bit timer/event counter mode
is selected.
In this mode, the count clock is selected by using the bits 0 through 3 (TCL10 through TCL13) of the timer clock
select register (TCL1), and the overflow signal of the 8-bit timer/event counter 1 (TM1) is used as the count clock
of the 8-bit timer/event counter 2 (TM2).
In this mode, counting is disabled or enabled by bit 0 (TCE1) of TMC1.
(1) Operation as interval timer
The two channels of 8-bit timer/event counters are used as a 16-bit interval timer that repeatedly generates
an interrupt request at time intervals specified by the count values set to the two 8-bit compare registers (CR10
and CR20) in advance. When setting a count value, write the value of the high-order 8 bits to CR20 and the
value of the low-order 8 bits to CR10. For the count value that can be set (interval time), refer to
Table
9-9
.
When the count values of the 8-bit timer registers 1 and 2 (TM1 and TM2) coincide with the values set to the
corresponding compare registers CR10 and CR20, the values of TM1 and TM2 are cleared to 0, TM1 and
TM2 continue counting, and at the same time, an interrupt request signal (INTTM2) is generated. For the
operation timing of the interval timer, refer to
Figure 9-11
.
The count clock can be selected by the bits 0 through 3 (TCL10-TCL13) of the timer clock select register 1
(TCL1). The overflow signal of TM1 is used as the count clock for TM2.
Figure 9-11. Interval Timer Operation Timing
Remark
Interval time = (N + 1) x t: N = 0000H-FFFFH
t
Interval time
Interval time
Interval time
Count clock
TMS (TM1, TM2)
count value
CR10, CR20
INTTM2
TO2
Clear
Count starts
Clear
N
N
N
N
Interrupt request accepted
Interrupt request accepted
0000
0001
0000
0001
N
0000
0001
N
N