參數(shù)資料
型號(hào)： μPD705101
廠商： NEC Corp.
英文描述： 32 Bit Microprocessor(32 位微處理器)
中文描述： 32位微處理器（32位微處理器）
文件頁(yè)數(shù)： 32/72頁(yè)
文件大?。?/td> 301K
代理商： ΜPD705101
μ
PD705101
32
(4) Medium-distance jump instruction format [FORMAT IV]
This instruction format has a six-bit operation code field and a 26-bit displacement field (the lowest-order bit must
be 0), giving a total length of 32 bits.
15
disp 26
16
0
10 9
0 31
opcode
(5) Three-operand instruction format [FORMAT V]
This instruction format has a six-bit operation code field, two general-purpose register designation fields, and a
16-bit immediate data field, giving a total length of 32 bits.
15
imm 16
16
10 9
0 31
opcode
5 4
reg 2
reg 1
(6) Load/store instruction format [FORMAT VI]
This instruction format has a six-bit operation code field, two general-purpose register designation fields, and a
16-bit displacement field, giving a total length of 32 bits.
15
disp 16
16
10 9
0 31
opcode
5 4
reg 2
reg 1
(7) Extended instruction format [FORMAT VII]
This instruction format has a six-bit operation code field, two general-purpose register designation fields, and a
six-bit sub-operation code field, giving a total length of 32 bits.
15
RFU
16
10 9
0 31
opcode
5 4
reg 2
reg 1
sub-opcode
26 25
(8) Three-register operand instruction format [FORMAT VIII]
This instruction format has a six-bit operation code field, three general-purpose register designation fields, and
a six-bit sub-operation code field, giving a total length of 32 bits.
15
RFU
16
10 9
0 31
opcode
5 4
reg 2
reg 1
sub-opcode
26 25
reg 3
21 20
(9) No-operand instruction format [FORMAT IX]
This instruction format has a six-bit operation code field and a one-bit sub-operation code field, giving a total length
of 16 bits.
15
RFU
s : sub-opcode
s
10 9
1 0
opcode
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