參數(shù)資料
型號： μPD705101
廠商： NEC Corp.
英文描述： 32 Bit Microprocessor(32 位微處理器)
中文描述： 32位微處理器（32位微處理器）
文件頁數(shù)： 11/72頁
文件大?。?/td> 301K
代理商： ΜPD705101
μ
PD705101
11
4. INTERRUPT/EXCEPTION PROCESSING FUNCTION
The features of the interrupt/exception processing function are as follows:
Interrupt
Non-maskable interrupt: 1 source
Maskable interrupt
: 15 sources
Priority of the programmable interrupt can be specified in four levels
Nesting interrupt can be controlled according to the priority
Mask can be specified for each maskable interrupt request
Valid edge of an external interrupt request can be specified
Noise rejection circuit provided for the non-maskable interrupt pin (NMI)
Exception
Software exception : 32 sources
Exception trap
: 4 sources
The interrupt/exception sources are shown in Tables 4-1 and 4-2.
Table 4-1. Reset/Non-maskable Interrupt/Exception Source List
Type
Classification
Source of Interrupt/Exception
Exception Code
Handler
Restore
Name
Note 1
Cause
(ECR)
Address
PC
Note 2
Reset
Interrupt
RESET
Reset input
FFF0H
FFFFFFF0H
Undefined
Non-maskable
Interrupt
NMI
NMI input
FFD0H
FFFFFFD0H
next PC
Note 3
Software exception
Exception
TRAP 1nH
TRAP instruction
FFBnH
FFFFFFB0H
next PC
TRAP 0nH
TRAP instruction
FFAnH
FFFFFFA0H
Exception trap
Exception
NMI
Dual exception
Note 4
FFFFFFD0H
current PC
FAULT
Fatal exception
Not affected
FFFFFFE0H
I-OPC
Illegal instruction
code
FF90H
FFFFFF90H
DIV0
Zero division
FF80H
FFFFFF80H
Notes 1.
Handler names used in development tools or software.
2.
The PC value saved to EIPC/FEPC/DPC when interrupt/exception processing is started.
3.
Execution of all instructions cannot be stopped by an interrupt.
4.
The exception code of an exception causing a dual exception.
Remark
n = 0H to FH
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