參數(shù)資料
型號: ZVP3310A
廠商: ZETEX PLC
元件分類: 小信號晶體管
英文描述: P-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET
中文描述: 140 mA, 100 V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET
封裝: TO-92, 3 PIN
文件頁數(shù): 1/3頁
文件大?。?/td> 82K
代理商: ZVP3310A
P-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ISSUE 2 MARCH 94
FEATURES
*
100 Volt V
DS
*
R
DS(on)
=20
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
SYMBOL
VALUE
UNIT
Drain-Source Voltage
V
DS
I
D
I
DM
V
GS
-100
V
Continuous Drain Current at T
amb
=25°C
Pulsed Drain Current
-140
mA
-1.2
A
Gate Source Voltage
±
20
V
Power Dissipation at T
amb
=25°C
Operating and Storage Temperature Range
P
tot
T
j
:T
stg
625
mW
-55 to +150
°C
ELECTRICAL CHARACTERISTICS (at T
amb
= 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN.
MAX. UNIT CONDITIONS.
Drain-Source Breakdown
Voltage
BV
DSS
-100
V
I
D
=-1mA, V
GS
=0V
Gate-Source Threshold
Voltage
V
GS(th)
-1.5
-3.5
V
ID=-1mA, V
DS
= V
GS
Gate-Body Leakage
I
GSS
20
nA
V
GS
=
±
20V, V
DS
=0V
Zero Gate Voltage Drain
Current
I
DSS
-1
-50
μ
A
μ
A
V
DS
=-100V, V
GS
=0
V
DS
=-80V, V
GS
=0V, T=125°C
(2)
On-State Drain Current(1)
I
D(on)
-300
mA
V
DS
=-25 V, V
GS
=-10V
Static Drain-Source On-State
Resistance (1)
R
DS(on)
20
V
GS
=-10V,I
D
=-150mA
Forward Transconductance
(1)(2)
g
fs
50
mS
V
DS
=-25V,I
D
=-150mA
Input Capacitance (2)
C
iss
50
pF
Common Source Output
Capacitance (2)
C
oss
15
pF
V
DS
=-25V, V
GS
=0V, f=1MHz
Reverse Transfer
Capacitance (2)
C
rss
5
pF
Turn-On Delay Time (2)(3)
t
d(on)
8
ns
V
DD
-25V, I
D
=-150mA
Rise Time (2)(3)
t
r
8
ns
Turn-Off Delay Time (2)(3)
t
d(off)
8
ns
Fall Time (2)(3)
t
f
8
ns
(1) Measured under pulsed conditions. Width=300
μ
s. Duty cycle
2%
(2) Sample test.
(
3
)
Switching times measured with 50
source impedance and <5ns rise time on a pulse generator
E-Line
TO92 Compatible
ZVP3310A
3-432
D
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