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參數(shù)資料
| 型號： | ZSP200 |
| 廠商： | LSI Corporation |
| 英文描述： | Highly Efficient Quad-MAC DSP Core |
| 中文描述： | 高效四MAC DSP核心 |
| 文件頁數(shù)： | 1/2頁 |
| 文件大?。?/td> | 67K |
| 代理商： | ZSP200 |
ZSP540- Highly Efficient
Quad-MAC DSP Core
O V E R V I E W
The ZSP540 processor core is a high-performance/power-efficient Quad-
MAC/Six-ALU implementation of the ZSP
G2 architecture. The ZSP540 utilizes a
16-bit architecture with extensive 32-bit capabilities and sets an unmatched
balance of performance/power/size and memory utilization efficiency. The
Z.Turbo feature provides the SOC designer with the option to extend the ZSP540
Instruction Set and the ability to add application-specific acceleration logic.
T A R G E T M A R K E T S
2.5/3G wireless baseband processing
Multimedia wireless and mobile devices
Cable/xDSL
Wireless LAN (WLAN)
Set-top box and home gateways
Multi-channel Voice Over IP (VoIP)
Software Defined Radio (SDR)
A P P L I C AT I O N B E N E F I T S
High-performance DSP capabilities
Excellent power/cost/speed balance
Excellent multimedia audio/video processing
Power efficient baseband processing performance
DSP and system control functions handling capabilities
C O R E F E AT U R E S
Quad-MAC/Six-ALU DSP core
4+1 instructions per cycle
Up to 350MHz, 8-stage pipeline design
Up to 1750 million instructions/sec
Dual 64-bit wide Load/Store data ports
Z.Turbo coprocessor extensions capable
24-bit address space
HW managed instructions scheduling
HW/SW controlled power management
Real-time trace and profiling capability
Full AMBA/AHB support (optional)
JTAG debug interface
Static, single phase clocked design
Compatible with all other ZSP cores
A R C H I T E C T U R E F E AT U R E S
Embedded control processing efficiency
32-bit addressing capabilities
16 and 32-bit standard instruction set
Extensive 32-bit and 40-bit support
Easy to program instruction set
Load/store register based instructions
Outstanding code density
User extensible instruction set
S U P P O R T
Highly optimized C-compiler
Multimedia, voice and wireless experts
Local support by ZSP solution experts
40-bit
ALU
16x16
MAC
16x16
MAC
Multiply/ALU Unit 0
40-bit
ALU
16x16
MAC
16x16
MAC
Multiply/ALU Unit 1
Bypass Logic
16-bit
ALU
16-bit
ALU
Timers
ALU Unit
Pipeline
Control Unit
(PCU)
Register File
Instruction
Sequence Unit
(ISU)
Prefetch Unit (PFU)
Interrupt Control
Co-Processor IF
Debug IF
File
Instruction Cache
Load/Store Unit (LSU)
Dual AGU
128-bit
64-bit
64-bit
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PDF描述 |
|---|---|
| ZSP500 | Highly Efficient Quad-MAC DSP Core |
| ZSP540 | Highly Efficient Quad-MAC DSP Core |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ZSP400 | 制造商:LSI 制造商全稱:LSI 功能描述:Highly Efficient Quad-MAC DSP Core |
| ZSP4403LEU/TR | 制造商:ZYWYN 功能描述:2.2V to 5.0V EL Driver with 220Vpp output |
| ZSP4422A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electroluminescent Lamp Driver |
| ZSP4422ACN | 制造商:ZYWYN 功能描述:2.2V to 5.0V EL Driver with 160Vpp output. Int Osc. 8 NSOIC |
| ZSP4422ACU | 制造商:ZYWYN 功能描述:2.2V to 5.0V EL Driver with 160Vpp Output. Int Osc. |
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