參數(shù)資料
型號(hào): ZPSD512B1V-C-20J
廠商: 意法半導(dǎo)體
英文描述: Low Cost Field Programmable Microcontroller Peripherals
中文描述: 低成本現(xiàn)場可編程微控制器外圍設(shè)備
文件頁數(shù): 128/153頁
文件大?。?/td> 1036K
代理商: ZPSD512B1V-C-20J
PSD5XX Famly
125
-20
-25
ZPLD_TURBO
OFF
*
Symbol
Parameter
Conditions
Min Max Min Max
Unit
t
WLQV (PA)
WR to Data Propagation Delay
(Note 2)
60
60
0
ns
t
DVQV (PA)
Data to Port A Data
Propagation Delay
(Note 5)
40
50
0
ns
t
WHQZ (PA)
WR Invalid to Port A Tri-state
(Note 2)
35
60
0
ns
Port A Peripheral Data Mode Write Timng
(3.0 V ± 10%)
Microcontroller Interface – AC/DC Parameters
(ZPSD5XXV Versions)
-20
-25
ZPLD_TURBO
OFF
*
Symbol
Parameter
Conditions
Min Max Min Max
Unit
t
AVQV (PA)
t
SLQV (PA)
t
RLQV (PA)
t
DVQV (PA)
t
QXRH (PA)
t
RLRH (PA)
t
RHQZ (PA)
Address Valid to Data Valid
(Note 3)
95
120
Add 20
ns
CS Valid to Data Valid
100
120
Add 20
ns
RD to Data Valid
(Notes 1 and 4)
50
90
0
ns
Data In to Data Out Valid
35
50
0
ns
RD Data Hold Time
(Note 1)
0
0
0
ns
RD Pulse Width
(Note 1)
40
70
0
ns
RD to Data High-Z
(Note 1)
35
60
0
ns
Port A Peripheral Data Mode Read Timng
(3.0 V ± 10%)
NOTES:
1. Any input used to select an internal ZPSD5XX function.
2. WR timing has the same timing as E, DS, LDS, UDS, WRL, WRH signals.
3.
Any input used to select Port A Data Peripheral Mode.
4.
Data is already stable on Port A.
5.
Data stable on ADIO pins to data on Port A.
*
NOTE:
If ZPLD_TURBO is off and the ZPLD is operating above 15 MHz, there is no need to add 20 ns to the timing parameters.
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