參數(shù)資料
型號: ZPSD501B1V
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有61個輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設(shè)備(可編程邏輯,零功耗,16K的位的SRAM,40余個可編程輸入/輸出,通用PLD的有61個輸入)
文件頁數(shù): 61/142頁
文件大?。?/td> 786K
代理商: ZPSD501B1V
ZPSD5XX Famly
7-61
Figure 31a. Automatic Power Down Unit (APD) Flow Chart
APD DISABLED
NEED
APD CLK
YES
YES
NO
NO
RESET
SET APD CLK IN PMMR1 BIT 0
SET ALE PD POLARITY
IN PMMRO BIT 1
CSI = "1"
NEED
SLEEP
MODE
SET SLEEP MODE IN PMMR1 BIT 1
ALE IDLE and
15 APD CLOCK
ALE IDLE and
15 APD CLOCK
SET ENABLE APD IN PMMR0 BIT 2
SET PMMR0 BIT 0
SET ENABLE APD IN PMMR0 BIT 2
SET PMMR0 BIT 0
DISABLE CLOCKS
ZPLD ACLK, ZPLD RCLK, TMR ZPLD
DISABLE CLOCKS
ZPLD ACLK, ZPLD RCLK, TMR ZPLD
PSD IN POWER DOWN MODE
PSD IN SLEEP MODE
Power
Management
Unit
(Cont.)
相關(guān)PDF資料
PDF描述
ZPSD503B1 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有61個輸入)
ZPSD503B1V Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有61個輸入)
ZPSD511B1 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有61個輸入)
ZPSD511B1V Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有61個輸入)
ZPSD602(V)E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,零功耗,4K位SRAM,26個可編程I/O,通用PLD有63個輸入)
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