參數(shù)資料
型號(hào)： ZPSD313
英文描述： Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗，16K位SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入)
中文描述： 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備（可編程邏輯，零功耗，16K的位的SRAM，19余個(gè)可編程輸入/輸出，通用PLD的有16個(gè)輸入）
文件頁(yè)數(shù)： 11/90頁(yè)
文件大?。?/td> 491K
代理商： ZPSD313
ZPSD3XX Famly
3-11
Operating
Modes
The ZPSD3XX’s four operating modes enable it to interface directly to 8- and 16-bit
microcontrollers with multiplexed and non-multiplexed address/data buses. These operating
modes are:
J
Multiplexed 8-bit address/data bus
J
Multiplexed 16-bit address/data bus (ZPSD30X)
J
Non-multiplexed address/data, 8-bit data bus
J
Non-multiplexed 16-bit address/data bus (ZPSD30X)
Multiplexed 8-bit Address/Data Bus
This mode is used to interface to microcontrollers with an 8-bit data bus and a 16-bit or
larger address bus. The address/data bus (AD0/A0–AD7/A7) is bi-directional and permits
the latching of the address when the ALE signal is active. On the same pins, the data is
read from or written to the device; this depends on the state of the RD/E or RD/E/DS pin,
BHE/PSEN or PSEN pin and WR/V
PP
or R/W pins. The high-order address/data bus
(AD8/A8–AD15/A15) contains the high-order address bus byte. Ports A and B can be
configured as in Table 2.
Multiplexed 16-bit Address/Data Bus
This mode is used to interface to microcontrollers with a 16-bit data bus and a 16-bit or
larger address bus. The low-order address/data bus (AD0/A0–AD7/A7) is bi-directional
and permits the latching of the address when the ALE signal is active. On the same
pins, the data is read from or written to the device; this depends on the state of the
RD/E/DS, BHE/PSEN, and WR/V
PP
or R/W pins. The high-order address/data bus
(AD8/A8–AD15/A15) is bi-directional and permits latching of the high-order address when
the ALE signal is active on the same pins. The high-order data bus is read from or written to
the device, depending on the state of the RD/E/DS, BHE/PSEN, and WR/V
PP
or R/W pins.
Ports A and B can be configured as in Table 2.
Non-Multiplexed
Address/Data, 8-bit Data Bus
This mode is used to interface to non-multiplexed 8-bit microcontrollers with an 8-bit data
bus and a 16-bit or larger address bus. The low-order address/data bus (AD0/A0–AD7/A7)
is the low-order address input bus. The high-order address/data bus (AD8/A8–AD15/A15)
(A8–A15 on the ZPSD31X) is the high-order address bus byte. Port A is the low-order data
bus. Port B can be configured as shown in Table 2.
Non-Multiplexed
Address/Data, 16-bit Data Bus
This mode is used to interface to non-multiplexed 16-bit microcontrollers with a 16-bit data
bus and a 16-bit or larger address bus. The low-order address/data bus (AD0/A0–AD7/A7)
is the low-order address input bus. The high-order address/data bus (AD8/A8–AD15/A15) is
the high-order address bus byte. Port A is the low-order data bus. Port B is the high-order
data bus.
Table 2 summarizes the effect of the different operating modes on ports A, B, and the
address/data pins. The configuration of Port C is independent of the four operating modes.
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZPSD313-15J 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Field-Programmable Peripheral
ZPSD313-15JI 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Field-Programmable Peripheral
ZPSD313-15LI 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Field-Programmable Peripheral
ZPSD313-15LM 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Field-Programmable Peripheral
ZPSD313-15U 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Field-Programmable Peripheral
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