參數(shù)資料
型號: ZPSD303
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,19個可編程I/O,通用PLD有16個輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設(shè)備(可編程邏輯,零功耗,16K的位的SRAM,19余個可編程輸入/輸出,通用PLD的有16個輸入)
文件頁數(shù): 17/90頁
文件大?。?/td> 491K
代理商: ZPSD303
ZPSD3XX Famly
3-17
Figure 6.
Port A Track
Mode
NOTE:
12.The expression for CSADOUT2 must include the following write operation cycle signals:
For CRRWR = 0, CSADOUT2 must include WR = 0.
For CRRWR = 1, CSADOUT2 must include E = 1 and R/W = 0.
INTERNAL
READ
CSADIN
INTERNAL
ALE
PA0–PA7
A11–A15
A16–A19
AD8–AD15
CSADOUT1
CSADOUT2
(12)
ALE or AS
AD0–AD7
RD/E
WR or R/W
CONTROL
DECODER
LATCH
PAD
I
O
Figure 5.
Port A Pin
Structure
NOTE:
11. CMOS/OD determines whether the output is open drain or CMOS.
READ PIN
PORT A PIN
ENABLE
ADDR
OUT
ADI/DI
READ DATA
WRITE DATA
ALE
READ DIR
WRITE DIR
RESET
CK
D
R
G
D
R
D
CK
R
CMOS/OD
(11)
I
N
T
E
R
N
A
L
A
D
D
R
/
D
A
T
A
B
U
S
A
D
0
/
A
D
7
DFF
LATCH
DIR
FF
CONTROL
MUX
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