
ZN448/9
8
Fig.10 R-2R ladder network
Fig.9 Typical clock frequency v C
CK
(R
CK
= 0)
1MHz
100kHz
10kHz
1kHz
10p
100p
1n
10n
100n
ANALOG CIRCUITS
D-A converter
The converter is of the voltage switching type and uses an R-
2R ladder network as shown in Fig.10. Each element is
connected to either 0V or V
by transistor voltage switches
specially designed for low offset voltage (1mV).
A binary weighted voltage is produced at the output of the R-
2R ladder.
D to A output = n (V
REF IN
-V
OS
) + V
OS
256
where n is the digital input to the D-A from the successive
approximation register.
V
is a small offset voltage that is produced by the device
supply current flowing in the package lead resistance. The
offset will normally be removed by the setting up procedure
and since the offset temperature coefficient is low (8
μ
V/
°
C)
the effect on accuracy will be neglible.
The D-A output range can be considered to be 0 - V
REF IN
through an output resistance R (4k).
2R
2R
2R
2R
2R
R(4k)
R
R
R
D TO A OUTPUT
DB6
DB0
VOS
DB1
DB7
0 VOLTS
(PIN 9)
VREF IN
(PIN 7)
VOLTAGE
SWITCHES