參數(shù)資料
型號(hào): ZL30106QDG1
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 數(shù)字傳輸電路
英文描述: SONET/SDH/PDH Network Interface DPLL
中文描述: ATM/SONET/SDH SUPPORT CIRCUIT, PQFP64
封裝: 10 X 10 MM, 1.0 MM HEIGHT, LEAD FREE, MS-026ACD, TQFP-64
文件頁數(shù): 26/48頁
文件大?。?/td> 1001K
代理商: ZL30106QDG1
ZL30106
Data Sheet
26
Zarlink Semiconductor Inc.
Figure 16 - Automatic Reference Switching - Coarse Reference Failure
4.5.2.2 Automatic Reference Switching - Reference Frequency Out-of-Range
When the currently-active input reference in Automatic mode fails through a subtle frequency offset, the REF_FAIL
output is asserted as soon as the Precise Frequency Monitor indicates an out-of-range reference (10 to 20
seconds). The HOLDOVER output is briefly asserted (approximately three reference input cycles) and the
REF_SEL outputs indicate that the device has switched to the other reference. Where the new reference is close
enough in frequency and TIE-corrected phase for the output to stay within the phase-lock-window, the LOCK output
will remain asserted through the reference-switch process. Where the new reference has enough frequency offset
and/or TIE-corrected phase offset to force the output outside the phase-lock-window, the LOCK output will de-
assert, the lock-qualify timer is reset, and LOCK will stay de-asserted for the full lock-time duration. Figure 17
illustrates this process.
50 ms
10 s
REF0
REF_FAIL0
HOLDOVER
REF_OOR0
(internal signal)
REF1
REF0
REF_SEL
SCM or CFM failure
LOCK
Lock Time
REF_DIS0
(internal signal)
Note: This scenario is based on REF1 remaining good throughout the duration.
LOCK pin behaviour depends on phase and frequency offset of REF1.
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