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參數(shù)資料
| 型號(hào)： | ZL10311GAC |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Digital Television DVB-T-On-a-Chip Processor |
| 中文描述： | 數(shù)字電視的DVB - T -上一芯片處理器 |
| 文件頁數(shù)： | 28/40頁 |
| 文件大?。?/td> | 352K |
| 代理商： | ZL10311GAC |
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ZL10310/ZL10311
Data Sheet
28
Zarlink Semiconductor Inc.
Note 2:
Note 3:
Note 4:
Note 5:
Multiplex setup with PORTMUX Register Bits [6:5] = ‘10’
Multiplex setup with PORTMUX Register Bits [6:5] = ‘0x’
Multiplex setup with CIC Control Register Bit 2 = ‘0’ and Bit 28 = ‘1’
Multiplex setup with CIC Control Register Bits 2 = ‘1’, Bit 28 = '1' and CICSEL3 Register Bit 6 = '0'
6.9 Smart Card Interface
Note 1:
Note 2:
Multiplex setup with CICSEL3 Register Bit 1 = '0'. Also if BI_DATA[6] = '0' at Reset.
Multiplex setup with CICSEL3 Register Bit 1 = '1'. Also if BI_DATA[6] = '1' at Reset.
6.10 General Purpose Input Output Interfaces
The General Purpose Input Output Interface is provided with 10 pins that can be configured as general purpose I/O
bits, or can provide several alternative interfaces. The bit I/Os are provided by the GPIS (input) and GPOS (output)
registers, and only the bits listed below should be used. Care should be observed when programming the registers
allocated to each of the GPIO ports.
There are multiplexed functions on these pins, and included is information on how to access these multiplexed
signals. The multiplexed functions include access to GPIO signals, I
2
C bus, I
2
S Audio Output signals, Test interface
signals, Clock signals, Video Sync Signals, Synchronous Serial Port signals and a VCXO error signal.
Pin Name
Pin
No.
Function
Pin
Type
Description
Notes
SGPIO0[0]
AD05
SGPIO0_0
IO 5V
Simplified General Purpose Input / Output
Bus 0 - Bit 0
1
SC0_IO
B 5V
Smart Card 0 Interface - Data I/O
2
SGPIO0[1]
AC03
SGPIO0_1
IO 5V
Simplified General Purpose Input / Output
Bus 0 - Bit 1
1
SC0_CLK
O 5V
Smart Card 0 Interface - Clock Output
2
SGPIO0[2]
AF04
SGPIO0_2
IO 5V
Simplified General Purpose Input / Output
Bus 0 - Bit 2
1
SC0_DETECT
I 5V
Smart Card 0 Interface - Detect Input
2
SGPIO0[3]
AD06
SGPIO0_3
IO 5V
Simplified General Purpose Input / Output
Bus 0 - Bit 3
1
SC0_RESET
O 5V
Smart Card 0 Interface - Reset Output
2
SGPIO0[4]
AF03
SGPIO0_4
IO 5V
Simplified General Purpose Input / Output
Bus 0 - Bit 4
1
SC0_VCC_COMMAND
O 5V
Smart Card 0 Interface - Vcc Enable Output
2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ZL10311 | Digital Television DVB-T-On-a-Chip Processor |
| ZL10310 | Power Quality Recorder; Bandwidth Max:60Hz; Kit Contents:CTs, Voltage Leads, Ground Probes and Leads, PC Software and Download Cable; Voltage Rating:600V RoHS Compliant: NA |
| ZL10310DTV-SOC | Digital Television DVB-T-On-a-Chip Processor |
| ZL10311DTV-SOC | Digital Television DVB-T-On-a-Chip Processor |
| ZL10312QCF | Satellite Demodulator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZL10312 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Satellite Demodulator |
| ZL10312QCF | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Satellite Demodulator |
| ZL10312QCG | 制造商:Microsemi Corporation 功能描述: |
| ZL10312QCG1 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Satellite Demodulator |
| ZL10312UBH | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Satellite Demodulator |
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