
Z86C72/C92/L72/L92
IR Microcontroller
Zilog
DS97LVO0900
P R E L I M I N A R Y
6-15
1
AC CHARACTERISTICS (Z86C72/C92 SPECIFICATIONS)
Preliminary
External I/O or Memory Read and Write Timing Table
T
A
= 0
°
C to +70
°
C
16.0 MHz
Min
25
25
35
35
No
1
Symbol
TdA(AS)
Parameter
V
CC
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
2
Address Valid to /AS
Rising Delay
/AS Rising to Address
Float Delay
/AS Rising to Read
Data Required Valid
/AS Low Width
2
TdAS(A)
2
3
TdAS(DR)
180
180
1,2
4
TwAS
40
40
0
0
135
135
80
80
2
5
Td
Address Float to /DS
Falling
/DS (Read) Low Width
6
TwDSR
1,2
7
TwDSW
/DS (Write) Low Width
1,2
8
TdDSR(DR)
/DS Falling to Read
Data Required Valid
Read Data to
/DS Rising Hold Time
/DS Rising to Address
Active Delay
/DS Rising to /AS
75
75
1,2
9
ThDR(DS)
0
0
2
10
TdDS(A)
50
50
35
35
25
25
35
35
25
25
2
11
TdDS(AS)
2
12
TdR/W(AS)
R//W Valid to /AS
Rising Delay
/DS Rising to
R//W Not Valid
2
13
TdDS(R/W)
2
14
TdDW(DSW) Write Data Valid to
/DS Falling (Write)
Delay
TdDS(DW)
/DS Rising to Write
Data Not Valid Delay
TdA(DR)
Address Valid to Read
Data Required Valid
TdAS(DS)
/AS Rising to /DS
Falling Delay
TdM(AS)
/DM Valid to /AS
Falling Delay
TdDS(DM)
/DS Rise to /DM Valid
Delay
ThDS(A)
/DS Rise to Address
Valid Hold Time
2
15
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
35
35
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2
16
230
230
1,2
17
45
45
30
30
70
70
70
70
2
18
2
19
20
Notes:
1. When using extended memory timing add 2 TpC.
2. Timing numbers given are for minimum TpC.
Standard Test Load
All timing references use 0.9 V
CC
for a logic 1 and 0.1 V
CC
for a logic 0.