參數(shù)資料
型號: Z86E72
廠商: ZiLOG, Inc.
英文描述: OTP IR Microcontroller(一次可編程紅外線微控制器)
中文描述: 檢察官辦公室紅外微控制器(一次可編程紅外線微控制器)
文件頁數(shù): 2/75頁
文件大?。?/td> 394K
代理商: Z86E72
Z86E72/73
OTP IR Microcontroller
Zilog
2
P R E L I M I N A R Y
DS97LVO1100
GENERAL DESCRIPTION
(Continued)
der software control to provide timing, status signals, par-
allel I/O with or without handshake, and an address/data
bus for interfacing external memory.
There are five basic address spaces available to support a
wide range of configurations: Program Memory, Register
File, Expanded Register File, Extended Data RAM and Ex-
ternal Memory. The register file is composed of 256 bytes
of RAM. It includes four I/O port registers, 16 control and
status registers and the rest are General Purpose regis-
ters. The Extended Data RAM adds 512 (E72) of usable
general-purpose registers. The Expanded Register File
consists of two additional register groups (F and D).
To unburden the program from coping with such real-time
problems as generating complex waveforms or receiving
and demodulating complex waveform/pulses, the Z86E7X
family offers a new intelligent counter/timer architecture
with 8-bit and 16-bit counter/timers (Figure 1). Also includ-
ed are a large number of user-selectable modes, and two
on-board comparators to process analog signals with sep-
arate reference voltages (Figure 2).
Notes:
All Signals with a preceding front slash, "/", are ac-
tive Low, for example, B//W (WORD is active Low); /B/W
(BYTE is active Low, only).
Power connections follow conventional descriptions be-
low:
Connection
Power
Ground
Circuit
V
CC
GND
Device
V
DD
V
SS
Figure 1. Z86E7X Counter/Timer Block Diagram
HI16
LO16
16-Bit
T16
TC16H
TC16L
HI8
LO8
And/Or
Logic
Clock
Divider
Glitch
Filter
Edge
Detect
Circuit
8-Bit
T8
TC8H
TC8L
8
8
16
8
Input
SCLK
1 2 4
8
Timer 16
Timer 8/16
Timer 8
8
8
8
8
8
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