參數(shù)資料
型號(hào)： XRT86VL34_1
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 33/63頁
文件大?。?/td> 402K
代理商： XRT86VL34_1
XRT86VL34
30
REV. V1.2.0
QUAD T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
JTAG INTERFACE
The XRT86VL34 device’s JTAG features comply with the IEEE 1149.1 standard. Please refer to the industry
specification for additional information on boundary scan operations.
S
IGNAL
N
AME
B
ALL
#
T
YPE
O
UTPUT
D
RIVE
(
M
A)
D
ESCRIPTION
TCK
C7
I
-
Test clock: Boundary Scan Test clock input:
The TCLK signal is the clock for the TAP controller, and it
generates the boundary scan data register clocking. The data
on TMS and TDI is loaded on the positive edge of TCK. Data
is observed at TDO on the falling edge of TCK.
TMS
C6
I
-
Test Mode Select:
Boundary Scan Test Mode Select input.
The TMS signal controls the transitions of the TAP controller
in conjunction with the rising edge of the test clock (TCK).
N
OTE
:
For normal operation this pin MUST be pulled "High".
TDI
B6
I
-
Test Data In:
Boundary Scan Test data input
The TDI signal is the serial test data input.
N
OTE
:
This pin is internally pulled ’high’.
TDO
D5
O
8
Test Data Out:
Boundary Scan Test data output
The TDO signal is the serial test data output.
TRST
A6
I
-
Test Reset Input:
The TRST signal (Active Low) asynchronously resets the TAP
controller to the Test-Logic-Reset state.
N
OTE
:
This pin is internally pulled ’high’
TESTMODE
B11
I
-
Factory Test Mode Pin
N
OTE
:
This pin is internally pulled ’low’, and should be pulled
’low’ for normal operation.
aTESTMODE
B5
I
-
Factory Test Mode Pin
N
OTE
:
This pin is internally pulled ’low’, and should be pulled
’low’ for normal operation.
ATP_Ring
B2
I
-
ATP_Ring Test Pin
This analog test pin is used for testing the continuity between
the TTIP/TRING, RTIP/RRING of each channel and the on-
board transformer.
ATP_Tip
C3
I
-
ATP_Tip Test Pin
This analog test pin is used for testing the continuity between
the TTIP/TRING, RTIP/RRING of each channel and the on-
board transformer.
相關(guān)PDF資料
PDF描述
XRT86VL34 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34_2 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
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