參數(shù)資料
型號: XRT86VL32IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: DATACOM, FRAMER, PBGA225
封裝: 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-225
文件頁數(shù): 97/174頁
文件大?。?/td> 903K
代理商: XRT86VL32IB
XRT86VL32
92
REV. V1.2.0
DUAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
.
.
T
ABLE
75: PMON R
ECEIVE
F
RAMING
A
LIGNMENT
B
IT
E
RROR
C
OUNTER
MSB (RFAECU) H
EX
A
DDRESS
: 0
X
n902
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
RFAEC[15]
RUR
0
Performance Monitor “Receive Framing Alignment Error 16-Bit
Counter” - Upper Byte:
These RESET-upon-READ bits, along with that within the “PMON
Receive Framing Alignment Error Counter Register LSB” combine
to reflect the cumulative number of instances that the Receive
Framing Alignment errors has been detected by the Receive E1
Framer block since the last read of this register.
This register contains the Most Significant byte of this 16-bit of the
Receive Framing Alignment Error counter.
N
OTE
:
For all 16-bit wide PMON registers, user must read the MSB
counter first before reading the LSB counter in order to read
the accurate PMON counts. To clear PMON count, user
must read the MSB counter first before reading the LSB
counter in order to clear the PMON count.
6
RFAEC[14]
RUR
0
5
RFAEC[13]
RUR
0
4
RFAEC[12]
RUR
0
3
RFAEC[11]
RUR
0
2
RFAEC[10]
RUR
0
1
RFAEC[9]
RUR
0
0
RFAEC[8]
RUR
0
T
ABLE
76: PMON R
ECEIVE
F
RAMING
A
LIGNMENT
B
IT
E
RROR
C
OUNTER
LSB (RFAECL) H
EX
A
DDRESS
: 0
X
n903
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
RFAEC[7]
RUR
0
Performance Monitor “Receive Framing Alignment Error 16-Bit
Counter” - Lower Byte:
These RESET-upon-READ bits, along with that within the “PMON
Receive Framing Alignment Error Counter Register MSB” combine
to reflect the cumulative number of instances that the Receive
Framing Alignment errors has been detected by the Receive E1
Framer block since the last read of this register.
This register contains the Least Significant byte of this 16-bit of the
Receive Framing Alignment Error counter.
N
OTE
:
For all 16-bit wide PMON registers, user must read the MSB
counter first before reading the LSB counter in order to read
the accurate PMON counts. To clear PMON count, user
must read the MSB counter first before reading the LSB
counter in order to clear the PMON count.
6
RFAEC[6]
RUR
0
5
RFAEC[5]
RUR
0
4
RFAEC[4]
RUR
0
3
RFAEC[3]
RUR
0
2
RFAEC[2]
RUR
0
1
RFAEC[1]
RUR
0
0
RFAEC[0]
RUR
0
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