參數(shù)資料
型號： XRT86VL32_07
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 136/174頁
文件大?。?/td> 903K
代理商： XRT86VL32_07
XRT86VL32
131
DUAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
REV. V1.2.0
T
ABLE
107: E
XCESSIVE
Z
ERO
S
TATUS
R
EGISTER
(EXZSR) H
EX
A
DDRESS
: 0
X
nB0E
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
5
SA7_EQ_0_STAT
RO
0
Received Sa7 Equals ‘0’ State
This READ ONLY bit field indicates whether or not the Receive E1
Framer is currently declaring the “Sa7 Equals 0” status within the
incoming E1 National Bits.
The “Received Sa7 Equals 0” status will be set to ‘1’ if the received
Sa7 is 0 for at least 2 out of 3 times.
0 = Indicates the E1 Receive Framer is currently not declaring the
“Received Sa7 Equals 0” status.
1 = Indicates the E1 Receive Framer is currently declaring the
“Received Sa7 Equals 0” status.
4-2
Reserved
-
-
Reserved
1
SA7_EQ_0_INT
RUR/
WC
0
Change in “Sa 7 Equals 0” Interrupt Status
This Reset-Upon-Read bit field indicates whether or not the
“Change in Sa7 Equals 0” interrupt has occurred since the last read
of this register.
If this interrupt is enabled, then the Receive E1 Framer block will
generate an interrupt in response to either one of the following
conditions.
1.
Whenever the Receive E1 Framer block detects the Received
Sa7 equals to 0 for at least 2 out of 3 times.
2.
Whenever the Receive E1 Framer block no longer detects the
Received Sa7 equals to the 0.
0 = Indicates that the “Change in Sa7 Equals 0” interrupt has not
occurred since the last read of this register
1 = Indicates that the “Change in Sa7 Equals 0” interrupt has
occurred since the last read of this register
0
EXZ_STATUS
RUR/
WC
0
Change in Excessive Zero Condition Interrupt Status
This Reset-Upon-Read bit field indicates whether or not the
“Change in Excessive Zero Condition” interrupt within the E1
Receive Framer Block has occurred since the last read of this regis-
ter.
If this interrupt is enabled, then the Receive E1 Framer block will
generate an interrupt in response to either one of the following
conditions.
1.
Whenever the Receive E1 Framer block detects the
Excessive Zero Condition.
2.
Whenever the Receive E1 Framer block clears the Excessive
Zero Condition
0 = Indicates the “Change in Excessive Zero Condition” interrupt
has NOT occurred since the last read of this register
1 = Indicates the “Change in Excessive Zero Condition” interrupt
has occurred since the last read of this register
相關(guān)PDF資料
PDF描述
XRT86VL32IB Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34_07 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34_1 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34_2 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
相關(guān)代理商/技術(shù)參數(shù)
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XRT86VL34 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
XRT86VL34_07 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
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