參數(shù)資料
型號(hào): XRT75L03IV-F
廠商: Exar Corporation
文件頁數(shù): 64/92頁
文件大?。?/td> 0K
描述: IC LIU E3/DS3/STS-1 3CH 128LQFP
標(biāo)準(zhǔn)包裝: 72
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 3/3
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 128-LQFP(14x20)
包裝: 托盤
XRT75L03
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
REV. 1.0.4
64
THE PER-CHANNEL REGISTERS
The XRT75L03 consists of 21 per-Channel Registers. Table 23 presents the overall Register Map with the
Per-Channel Registers shaded.
TABLE 22: CHIP REVISION NUMBER REGISTER - CR63 (ADDRESS LOCATION = 0X3F)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
Chip Revision Number Value
R/O
1
0
XX
BIT NUMBER
NAME
TYPE
DEFAULT
VALUE
DESCRIPTION
7 - 0
Chip Revision
Number Value
R/O
0x0#
Chip Revision Number Value:
This READ-ONLY register contains a value that represents
the current revision of this XRT75L03. This revision num-
ber will always be in the form of "0x0#", where "#" is a
hexadecimal value that specifies the current revision of the
chip.
For example, the very first revision of this chip will contain
the value "0x01".
TABLE 23: COMMAND REGISTER ADDRESS MAP, WITHIN THE XRT75L03 3-CHANNEL DS3/E3/STS-1 LIU W/ JITTER
ATTENUATOR IC
ADDRESS
COMMAND REGISTER
TYPE
REGISTER NAME
0x00
CR0
R/W
APS/Redundancy Control Register
CHANNEL 0 CONTROL REGISTERS
0x01
CR1
R/O
Source Level Interrupt Enable Register - Channel 0
0x02
CR2
R/W
Source Level Interrupt Status Register Channel 0
0x03
CR3
R/O
Alarm Status Register - Channel 0
0x04
CR4
R/W
Transmit Control Register - Channel 0
0x05
CR5
R/W
Receive Control Register - Channel 0
0x06
CR6
R/W
Channel Control Register - Channel 0
0x07
CR7
R/W
Jitter Attenuator Control Register - Channel 0
CHANNEL 1 CONTROL REGISTERS
0x08
CR8
R/O
Reserved
0x09
CR9
R/W
Source Level Interrupt Enable Register - Channel 1
0x0A
CR10
RUR
Source Level Interrupt Status Register - Channel 1
0x0B
CR11
R/O
Alarm Status Register - Channel 1
0x0C
CR12
R/W
Transmit Control Register - Channel 1
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