參數(shù)資料
型號: XRT73R06
廠商: Exar Corporation
英文描述: SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
中文描述: 六通道線路接口單元E3/DS3/STS-1
文件頁數(shù): 24/68頁
文件大?。?/td> 347K
代理商: XRT73R06
XRT73R06
REV. 1.0.0
á
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
21
3.2
The Transmit Clock applied via TxClk_n pins, for the selected data rate (for E3 = 34.368 MHz, DS3 = 44.736
MHz or STS-1 = 51.84 MHz), is duty cycle corrected by the internal PLL circuit to provide a 50% duty cycle
clock to the pulse shaping circuit. This allows a 30% to 70% duty cycle Transmit Clock to be supplied.
3.3
B3ZS/HDB3 E
NCODER
When the Single-Rail (NRZ) data format is selected, the Encoder Block encodes the data into either B3ZS
format (for either DS3 or STS-1) or HDB3 format (for E3).
3.3.1
B3ZS Encoding
An example of B3ZS encoding is shown in Figure 11. If the encoder detects an occurrence of three
consecutive zeros in the data stream, it is replaced with either B0V or 00V, where ‘B’ refers to Bipolar pulse
that is compliant with the Alternating polarity requirement of the AMI (Alternate Mark Inversion) line code and
‘V’ refers to a Bipolar Violation (e.g., a bipolar pulse that violates the AMI line code). The substitution of B0V or
00V is made so that an odd number of bipolar pulses exist between any two consecutive violation (V) pulses.
This avoids the introduction of a DC component into the line signal.
Transmit Clock
3.3.2
An example of the HDB3 encoding is shown in Figure 12. If the HDB3 encoder detects an occurrence of four
consecutive zeros in the data stream, then the four zeros are substituted with either 000V or B00V pattern. The
substitution code is made in such a way that an odd number of pulses exist between any consecutive V pulses.
This avoids the introduction of DC component into the analog signal.
HDB3 Encoding
F
IGURE
10. D
UAL
-R
AIL
D
ATA
F
ORMAT
(
ENCODER
AND
DECODER
ARE
DISABLED
)
F
IGURE
11. B3ZS E
NCODING
F
ORMAT
TxClk
TPData
TNData
Data 1 1 0
0
0
0
1
1
1
1
1
1
1
V
B
V
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
V
B
V
0
0
0
TClk
Line
Signal
TPDATA
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