參數(shù)資料
型號: XRT73LC04A
廠商: Exar Corporation
英文描述: 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
中文描述: 4通道DS3/E3/STS-1線路接口單元
文件頁數(shù): 60/64頁
文件大小: 360K
代理商: XRT73LC04A
XRT73LC04A
4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.1
56
This bit-field has no defined functionality
Command Register CR4-(n)
The bit-format and default values for Command Reg-
ister CR4 are listed below followed by the function of
each of these bit-fields.
COMMAND REGISTER CR4-(n)
Bit D4 - Reserved
This bit-field has no defined functionality
Bit D3 - STS-1/(DS3_(n)) - Channel(n) - Mode Se-
lect
This Read/Write bit field is used to configure Chan-
nel(n) to operate in either the SONET STS-1 Mode or
the DS3 Mode.
Writing a "0" into this bit-field configures Channel(n)
to operate in the DS3 Mode. Writing a "1" into this bit-
field configures Channel(n) to operate in the SONET
STS-1 Mode.
N
OTE
:
This bit-field is ignored if the E3_(n) bit-field (e.g.,
D2 within this Command Register) is set to "1".
Bit D2 - E3 Mode Select - Channel(n)
This Read/Write bit-field is used to configure Chan-
nel(n) to operate in the E3 Mode.
Writing a "0" into this bit-field configures Channel(n)
to operate in either the DS3 or SONET STS-1 Mode
as specified by the setting of the DS3 bit-field within
this Command Register. Writing a "1" into this bit-
field configures Channel(n) to operate in the E3
Mode.
Bit D1 - LLB_(n) (Local Loop-Back - Channel(n))
This Read/Write bit-field along with RLB_(n) is used
to configure Channel(n) to operate in any one of a va-
riety of Loop-Back modes.
Table 8 relates the contents of LLB_(n) and RLB_(n)
and the corresponding Loop-Back mode for Chan-
nel(n).
Bit D0 - RLB_(n) (Remote Loop-Back - Chan-
nel(n))
This Read/Write bit-field, along with LLB_(n), is used
to configure Channel(n) to operate in any one of a va-
riety of Loop-Back modes.
Table 8 relates the contents of LLB_(n) and RLB_(n)
and the corresponding Loop-Back mode for Chan-
nel(n).
5.3
O
PERATING
THE
M
ICROPROCESSOR
S
ERIAL
I
NTERFACE
.
The XRT73LC04A Serial Interface is a simple four
wire interface that is compatible with many of the mi-
crocontrollers available in the market. This interface
consists of the following signals:
CS - Chip Select (Active Low)
SClk - Serial Clock
SDI - Serial Data Input
SDO - Serial Data Output
Using the Microprocessor Serial Interface
The following instructions for using the Microproces-
sor Serial Interface are best understood by referring
to the diagram in Figure 37 and the timing diagram in
Figure 38.
In order to use the Microprocessor Serial Interface, a
clock signal must be first applied to the SClk input
pin. Then, initiate a Read or Write operation by as-
serting the active-low Chip Select input pin CS. It is
important to assert the CS
pin (e.g., toggle it “Low") at
least 5ns prior to the very first rising edge of the clock
signal.
Once the CS input pin has been asserted, the type of
operation and the target register address must now
be specified. Provide this information to the Micro-
processor Serial Interface by writing eight serial bits
of data into the SDI input.
D4
D3
D2
D1
D0
Reserved STS-1/DS3_(n)
E3_(n)
LLB_(n) RLB_(n)
0
0
0
0
0
T
ABLE
8: C
ONTENTS
OF
LLB_(n)
AND
RLB_(n)
AND
THE
C
ORRESPONDING
L
OOP
-B
ACK
M
ODE
FOR
C
HANNEL
(n)
LLB
_(n)
RLB
_(n)
L
OOP
-B
ACK
M
ODE
(
FOR
C
HANNEL
(n)
)
0
0
None
1
0
Analog Loop-Back Mode (See Section 4.1 for details)
1
1
Digital Loop-Back Mode (See Section 4.2 for details)
0
1
Remote Loop-Back Mode (See Section 4.3 for details)
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