參數(shù)資料
型號: XRT73L03A
廠商: Exar Corporation
英文描述: 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
中文描述: 三通道DS3/E3/STS-1線路接口單元
文件頁數(shù): 33/62頁
文件大?。?/td> 494K
代理商: XRT73L03A
XRT73L03A
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 2.0.4
31
N
OTE
:
This method can only be used if the XRT73L03A is
operating in the HOST Mode.
If either of these methods are used to disable the
HDB3/B3ZS Encoder, then the LIU transmits the data
as received via the TPData_(n) and TNData_(n) input
pins.
2.4
T
HE
T
RANSMIT
P
ULSE
S
HAPING
C
IRCUITRY
The Transmit Pulse Shaper Circuitry consists of a
Transmit Line Build-Out circuit which can be enabled
or disabled by setting the TxLEV_(n) input pin or
TxLEV_(n) bit-field to “High”or "Low". The purpose of
the Transmit Line Build-Out circuit is to permit config-
uration of each channel to transmit an output pulse
which is compliant to either of the following pulse
template requirements when measured at the Digital
Cross Connect System. Each of these Bellcore spec-
ifications state that the cable length between the
Transmit Output and the Digital Cross Connect sys-
tem can range anywhere from 0 to 450 feet.
The Isolated DSX-3 Pulse Template Requirement per
Bellcore GR-499-CORE is illustrated in Figure 19 and
the Isolated STSX-1 Pulse Template Requirement
per Bellcore GR-253-CORE is illustrated in Figure 20.
X
1
X
X
X
COMMAND REGISTER CR2-(n)
D4
D3
D2
D1
D0
F
IGURE
19. T
HE
B
ELLCORE
GR-499-CORE T
RANSMIT
O
UTPUT
P
ULSE
T
EMPLATE
FOR
DS3 A
PPLICATIONS
DS3 Pulse Template
-0.2
0
0.2
0.4
0.6
0.8
1
1.2
-1
-09
-08
-07
-06
-05
-04
-03
-02
-01
0
01
02
03
04
05
06
07
08
09
1
11
12
13
14
Time, in UI
N
Lower Curve
Upper Curve
相關PDF資料
PDF描述
XRT73L03AIV 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L03B 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L03BIV 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L04A 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L04AIV 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
相關代理商/技術參數(shù)
參數(shù)描述
XRT73L03AIV 制造商:Exar Corporation 功能描述:
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