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參數(shù)資料
| 型號： | XRT73L02MIVTR-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 33/46頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU E3/DS3/STS-1 2CH 100TQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 2/2 |
| 規(guī)程： | DS3，E3，STS-1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP（14x14） |
| 包裝： | 帶卷 (TR) |
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xr
XRT73L02M
TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.0.0
37
TABLE 17: REGISTER MAP DESCRIPTION - CHANNEL 0
ADDRESS
(HEX)
TYPE
REGISTER
NAME
BIT#
SYMBOL
DESCRIPTION
DEFAULT
VALUE
0x01 (ch 0)
0x09 (ch 1)
R/W
Interrupt
Enable
(source
level)
D0
DMOIE_n
Writing a “1” to this bit enables an interrupt when the
no transmission detected on channel output.
0
D1
RLOSIE_n Writing a “1” to this bit enables an interrupt when
Receive Los of Signal is detected.
0
D2
RLOLIE_n
Writing a “1” to this bit enables an interrupt when
Receive Loss of Lock condition is detected
0
D3
Reserved
0
D7-D4
Reserved
0x02 (ch 0)
0x0A (ch 1)
Reset
on
Read
Interrupt
Status
(source
level)
D0
DMOIS_n
This bit is set every time a DMO status change has
occurred since the last cleared interrupt.This bit is
cleared when the register bit is read.
0
D1
RLOSIS_n This bit is set every time a RLOS status change has
occurred since the last cleared interrupt. This bit is
cleared when the register bit is read.
0
D2
RLOLIS_n
This bit is set every time a RLOL status change has
occurred since the last cleared interrupt. This bit is
cleared when the register bit is read.
0
D3
Reserved
0
D7-D4
Reserved
0x03 (ch 0)
0x0B (ch 1)
Read
Only
Alarm Sta-
tus
D0
DMO_n
This bit is set every time the MTIP_0/MRing_0 input
pins have not detected any bipolar pulses for 128
consecutive bit periods.
0
D1
RLOS_n
This bit is set every time the receiver declares an
LOS condition.
0
D2
RLOL_n
This bit is set every time when the receiver declares
a Loss of Lock condition.
0
D3
Reserved
0
D4
ALOS_n
This bit is set every time the receiver declares Ana-
log LOS condition.
0
D5
DLOS_n
This bit is set every time the receiver declares Digital
LOS condition.
0
D6
PRBSLS_n This bit is set every time the PRBS detector is not in
sync.
0
D7
Reserved
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT73L03 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL E3/DS3/STS-1 LINE INTERFCE UNIT |
| XRT73L03A | 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L03AIV | 制造商:Exar Corporation 功能描述: |
| XRT73L03B | 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L03BES | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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