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參數(shù)資料
| 型號(hào)： | XRT7295ATIWTR-F |
| 廠商： | Exar Corporation |
| 文件頁(yè)數(shù)： | 5/18頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC RCVR DS3/SONET STS-1 20SOJ |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 接收器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 1/1 |
| 規(guī)程： | DS3，STS-1 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-BSOJ |
| 供應(yīng)商設(shè)備封裝： | 20-SOJ |
| 包裝： | 帶卷 (TR) |
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XRT7295AT
13
Rev.1.20
Data
Rate
REQB
LOSTHR
Min.
Threshold
Max.
Threshold
Unit
DS3
0
60
220
mV pk
VDD/2
40
145
mV pk
VDD
25
90
mV pk
1
0
45
175
mV pk
VDD/2
30
115
mV pk
VDD
20
70
mV pk
STS-1
0
75
275
mV pk
VDD/2
50
185
mV pk
VDD
30
115
mV pk
1
0
55
220
mV pk
VDD/2
35
145
mV pk
VDD
25
90
mV pk
Notes
- Lower threshold is 1.5 dB below upper threshold.
- The RLOS alarm is an indication of the absence of an input signal, not a bit error rate indication (independent of the RLOS state). The
device will attempt to recover correct timing data. The RLOS low-to-high transition typically occurs 1dB below the high to low transi-
tion.
Table 6. Analog Loss-of-Signal Thresholds
RECOVERED CLOCK AND DATA TIMING
Table 7
and Figure 11 summarize the timing relationships
between the logic signals RCLK, RPDATA, and RNDATA.
The duty cycle is referenced to VDD/2 threshold level.
RPDATA and RNDATA change on the rising edge of
RCLK and are valid during the falling edge of RCLK. A
positive pulse at RIN creates a high level on RPDATA and
a low level on RNDATA. A negative pulse at the input
creates a high level on RNDATA and a low level on
RPDATA, and a received zero produces low levels on
both RPDATA and RNDATA.
IN-CIRCUIT TEST CAPABILITY
When pulled low, the ICT pin forces all digital output
buffers (RCLK, RPDATA, RNDATA, RLOS, RLOL pins) to
be placed in a high output impedance state. This feature
allows in-circuit testing to be done on neighboring devices
without concern for XRT7295AT device buffer damage.
An internal pull-up device (nominally 50kW) is provided on
this pin therefore, users can leave this pin unconnected
for normal operation. Test equipment can pull ICT low
during in-circuit testing without damaging the device.
This is the only pin for which internal pull-up/pull-down is
provided.
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| XRT7295CTIW | 功能描述:總線接收器 DS3/E3/SONET STS-1 Line Receiver RoHS:否 制造商:Texas Instruments 接收機(jī)數(shù)量:4 接收機(jī)信號(hào)類型:Differential 接口類型:EIA/TIA-422-B, V.11 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-16 封裝:Reel |
| XRT7295CTIW-F | 功能描述:總線接收器 DS3/E3/SONET STS-1 Line Receiver RoHS:否 制造商:Texas Instruments 接收機(jī)數(shù)量:4 接收機(jī)信號(hào)類型:Differential 接口類型:EIA/TIA-422-B, V.11 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-16 封裝:Reel |
| XRT7295E | 制造商:EXAR 制造商全稱:EXAR 功能描述:INTEGRATED LINE RECEIVER |
| XR-T7295E | 制造商:EXAR 制造商全稱:EXAR 功能描述:INTEGRATED LINE RECEIVER |
| XR-T7295E-1EIP | 制造商:EXAR 制造商全稱:EXAR 功能描述:INTEGRATED LINE RECEIVER |
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