參數(shù)資料
型號: XRT6165IDTR-F
廠商: Exar Corporation
文件頁數(shù): 9/15頁
文件大小: 0K
描述: IC DGTL DATA PROCESSOR 24SOIC
產(chǎn)品變化通告: Packaging Change 15/Jul/2010
標準包裝: 1,000
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: E1
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 24-SOIC
包裝: 帶卷 (TR)
XR-T6165
3
Rev. 2.04
PIN CONFIGURATION
S+R
24
1
13
12
2
3
4
5
6
7
15
14
17
16
8
9
19
18
10
11
23
22
21
20
ALARM
PCMOUT
RTSEL
TS2R
S-R
BLS
RX2MHz
TS1R
VSS
TX2MHz
PCMIN
BLANK
VDD
RXCK2MHz
TS1T
TX256kHz
TS2T
ALARMIN
T+R
TTSEL
T-R
NC
24 Lead SOIC (JEDEC, 0.300”)
PIN DESCRIPTION
DIP
Pin #
SOIC
Pin #
Symbol
Type
Description
1
1
S+R
I
Positive AMI Data to Receiver
. Positive data from the XR-T6164 receive-side.
Active low.
2
2
S-R
I
Negative AMI Data to Receiver.
Negative data from the XR-T6164 receive-side.
Active low.
3
3
BLS
I
Byte Locking Supervision
. When active, causes blanking of PCMOUT under
received alarm conditions. Active low.
4
4
RX2MHz
I
Receiver 2.048MHz Clock.
Used to clock out PCM data.
5
5
BLANK
I
PCMOUT Data Blanking.
When active, forces PCMOUT data to all ones (AIS).
Active high.
6
6
VDD
+5V +10% Power Source.
7
7
RXCK2MHz
I
2.048MHz Clock.
Used by receiver clock recovery circuit.
8
8
TS1T
I
Transmitter time-slot 1 Input.
9
9
TS2T
I
Transmitter time-slot 2 Input.
10
10
T+R
O
Transmit Positive AMI Data Output
. Data to XR-T6164 positive transmitter input.
Active low
11
11
T-R
O
Transmit Negative AMI Data Output.
Data to XR-T6164 negative transmitter input.
Active low.
12
NC
No Connect.
13
NC
No Connect.
12
14
TTSEL
I
Transmit time-slot Select
. When high, TS1T is selected; when low, TS2T is
selected.
13
15
ALARMIN
I
Alarm Input
. When active, inhibits insertion of violations used for octet timing in
transmitter output. Active high
14
16
TX256kHz
I
Transmitter 256kHz Clock.
Used to output 64kbps encoded data.
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