參數(shù)資料
型號(hào): XRT6165IDTR-F
廠商: Exar Corporation
文件頁(yè)數(shù): 3/15頁(yè)
文件大小: 0K
描述: IC DGTL DATA PROCESSOR 24SOIC
產(chǎn)品變化通告: Packaging Change 15/Jul/2010
標(biāo)準(zhǔn)包裝: 1,000
類型: 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: E1
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 24-SOIC
包裝: 帶卷 (TR)
XR-T6165
11
Rev. 2.04
Transmitter Code Conversion
Figure 7 shows the transmitter code conversion process
that CCITT G.703 specifies for a 64kbps codirectional
interface.
Step 1
- A 64kbps bit period is divided into four unit
intervals.
Step 2
- A binary 1 is coded as a 1100.
Step 3
- A binary 0 is coded as a 1010.
Step 4
- The binary signal is converted into a three-level
signal by alternating the polarity of consecutive blocks.
Step 5
- The alternation in polarity of the blocks is violated
every eighth block. The violation block marks the last bit
in an octet.
Bit Number
64kbps data
Steps 1-3
Step 4
Step 5
Octet Timing
Violation
1
0
01
0
1
10
1
78
2
3
4
5
6
7
8
Figure 7. Transmitter Code Conversion for a 64kbps Bipolar Line Signal
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