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參數(shù)資料
| 型號(hào)： | XRT59L921IB |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | TWENTY-ONE CHANNEL E1 LINE INTERFACE UNIT |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PBGA316 |
| 封裝： | 21 X 21 MM, STBGA-316 |
| 文件頁數(shù)： | 18/32頁 |
| 文件大?。?/td> | 377K |
| 代理商： | XRT59L921IB |
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XRT59L921
16
TWENTY-ONE CHANNEL E1 LINE INTERFACE UNIT
REV. 1.2.1
In general, if the XRT59L921 samples a “1” on the TxPOS_n input pin, then the Transmit Section of the device
will ultimately generate a positive polarity pulse via the TTIP_n and TRing_n output pins (across a 1:2 trans-
former). Conversely, if the XRT59L921 samples a “1” on the TxNEG_n input pin, then the Transmit Section of
the device will ultimately generate a negative polarity pulse via the TTIP_n and TRing_n output pins (across a
1:2 transformer).
1.2.1
Operating the Transmitter in the Clockless Mode
The user can configure a given channel (within theXRT59L921) to operate in the Clockless mode by doing the
following:
Not applying a clock signal to the TxClk_n input, and pulling this pin to VDD.
By applying RZ (Return to Zero) data to the TxPOS_n and TxNEG_n input pins, as illustrated below.
If TxClk_n is grounded and RZ data is applied to TPOS and TNEG, the transmitter will be
powered down and tri-stated.
1.2.2
Shutting off the Transmiter
The Transmit Driver for each Channel_n (within the XRT59L921) can be shut off. To activate this feature,
Connect the TxCLK_n input pin to a logic "0" (e.g. GND) and continue to apply data via the TxPOS_n and
TxNEG_n input pins.
F
IGURE
4. I
LLUSTRATION
ON
HOW
THE
XRT59L921 S
AMPLES
THE
DATA
ON
THE
T
X
POS_
N
AND
T
X
NEG_
N
INPUT
PINS
T
su
T
ho
TxPOS_n
TxNEG_n
TClk_n
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