ELECTRICAL CHARACTERISTICS (CONT’D) Parameters Min. Typ. Max. Unit Conditions AC" />
參數(shù)資料
型號: XRT5683AIDTR-F
廠商: Exar Corporation
文件頁數(shù): 7/12頁
文件大?。?/td> 0K
描述: IC PCM LINE INTERFACE 18SOIC
產(chǎn)品變化通告: Packaging Change 15/Jul/2010
標準包裝: 1,000
功能: PCM 線路接口芯片
接口: PCM
電路數(shù): 1
電源電壓: 4.75 V ~ 5.25 V
電流 - 電源: 40mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 18-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 18-SOIC
包裝: 帶卷 (TR)
XR-T5683A
4
Rev. 2.0.2
ELECTRICAL CHARACTERISTICS (CONT’D)
Parameters
Min.
Typ.
Max.
Unit
Conditions
AC Electrical Characteristics (Cont’d)
Transmitter Section
Pulse Width at 8.448MHz
53
65
ns
Measured at Pin 13 & 15, See Figure 6
Output Rise Time
12
25
ns
See
Figure 5
Output Fall Time
12
25
ns
See
Figure 5
Output Pulse Imbalance
2.5
ns
At 50% Output Level
Specifications are subject to change without notice
Notes
Bold face parameters
are covered by production test and guaranteed over operating temperature range.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
+20V
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature
-65°C to +150°C
. . . . . . . . . . . . . .
SYSTEM DESCRIPTION
The incoming bipolar PCM signal which is attenuated and
distorted by the cable is applied to the threshold
comparator and the peak detector . The peak detector
generates a DC reference for the threshold comparator
for data and clock extraction. An external tank circuit
tuned to the appropriate frequency is added for the later
operation. The clock signal, data (+) and data (-) all go
through a similar level shifter to be converted into TTL
level to be compatible for digital processing.
In the transmit direction, the output drivers consist of two
identical TTL inputs with open collector output
stages.
The maximum low level current these output stages can
sink is 40mA. With full width data (NRZ) applied to the
inputs together with a synchronized clock, the output will
generate a bipolar signal when driving a center-tapped
transformer. A block diagram of the XR-T5683A is shown
in
Figure 1.
The clock recovery uses an external tank circuit. The
receive data will create an excitation for the tank circuitry
which in turn will create a recovered, received clock
(RCLK).
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