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參數(shù)資料
| 型號(hào)： | XRK7955 |
| 廠商： | EXAR CORP |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER |
| 中文描述： | 7955 SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, LQFP-32 |
| 文件頁數(shù)： | 5/10頁 |
| 文件大小： | 157K |
| 代理商： | XRK7955 |
XRK7955
INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
PRELIMINARY
xr
REV. P1.0.1
5
a.
Inputs have internal pullup/pulldown resistors which affect the input current.
b.
Clock inputs driven by LVPECL compatible signals.
DC C
HARACTERISTICS
(V
CC
= 3.3 + 5%, T
A
= -40
°
C
TO
+85
°
C)
S
YMBOL
C
HARACTERISTICS
M
IN
T
YP
M
AX
U
NIT
C
ONDITION
LVCMOS control inputs (MR, PLL_En, Sel_CLK, Man_Override, Alarm_Reset)
V
IH
Input voltage high
2.0
VCC+0.3
V
V
IL
Input voltage low
0.8
V
I
IN
Input current
a
100
-150
μΑ
V
IN
=V
CC
or V
IN
=GND
LVCMOS Control Outputs
V
OH
Output High Voltage
2.0
V
I
OH
=-10mA
V
OL
Output Low Voltage
0.55
V
I
OL
=10mA
LVPECL clock inputs (CLK, CLK)
b
I
IN
Input current
+100
μΑ
V
IN
=V
CC
or V
IN
=GND
LVPECL clock outputs (Qa[1:0], Qa[1:0], Qb[2:0], Qb[2:0])
V
OH
Output high voltage
V
CC
-1.2
V
CC
-0.7
V
Termination 50
to V
TT
V
OL
Output low voltage
V
CC
-1.9
V
CC
-1.45
V
Termination 50
to V
TT
Supply Current
I
GND
Maximum ground supply current - gnd pins
180
mA
GND pins
I
CCPLL
Maximum PLL power supply - VCC_PLL pin
15
mA
V
CCPLL
pin
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