• 參數(shù)資料
    型號(hào): XRD9816BCV-F
    廠商: Exar Corporation
    文件頁(yè)數(shù): 1/53頁(yè)
    文件大?。?/td> 0K
    描述: IC 16BIT CCD/CIS SIG PROC 48TQFP
    標(biāo)準(zhǔn)包裝: 250
    位數(shù): 16
    通道數(shù): 3
    電壓 - 電源,模擬: 4.5 V ~ 5.5 V
    電壓 - 電源,數(shù)字: 3 V ~ 5.5 V
    封裝/外殼: 48-TQFP
    供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
    包裝: 托盤(pán)
    EXAR Corporation, 48720 Kato Road, Fremont, CA 94538
    (510) 668-7000 FAX (510) 668-7017 www.exar.com
    Rev. 1.00
    XRD9814B/XRD9816B
    3-Channel 14/16-Bit Linear
    CCD/CIS Sensor Signal Processors
    November 2002-2
    FEATURES
    14-Bit (XRD9814B) or 16-Bit (XRD9816B)
    A/D Converter
    Triple-Channel, 2.5 MSPS Color Scan Mode
    Single-Channel, 6 MSPS Monochrome Scan
    Mode
    Triple Correlated Double Sampler
    Triple 10-Bit Programmable Gain Amplifier
    Triple 10-Bit Offset Compensation DAC
    Fully Differential or Single-Ended Inputs
    CDS or S/H Mode
    Inverting or Non-Inverting Mode
    Internal Voltage Reference
    Serial Control: On Data Bus or Separate Pins
    Improved PGA Performance
    APPLICATIONS
    48-Bit Color Scanners (XRD9816B)
    42-Bit Color Scanners (XRD9814B)
    CCD or CIS Color Imagers
    Gray Scale Scanners
    Film Scanners
    GENERAL DESCRIPTION
    The XRD9814B/9816B is a fully integrated, high-per-
    formance analog signal processor/digitizer specifi-
    cally designed for use in 3-channel linear Charge
    Coupled Device (CCD) and Contact Image Sensitive
    (CIS) imaging applications.
    Each channel of the XRD9814B/9816B includes a
    Correlated Double Sampler (CDS), Programmable
    Gain Amplifier (PGA) and channel offset adjustment.
    After gain and offset adjustment, the analog inputs are
    sequentially sampled and digitized by an accurate 14/
    16-bit A/D converter. The analog front-end can be
    configured for inverting/non-inverting input, CDS or
    sample-hold (S/H)
    mode,
    or
    AC/DC
    coupling,
    making the XRD9814B/9816B suitable for use in CCD,
    CIS and other data acquisition applications.
    14-Bit or 8-Bit (Nibble) Parallel Data Output
    (XRD9814B)
    16-Bit or 8-Bit (Nibble) Parallel Data Output
    (XRD9816B)
    5V Operation and 3V I/O Compatibility
    Low Power CMOS: 500mW @ 5V
    The CDS mode of operation supports both line and
    pixel-clamp modes and can be used to achieve signifi-
    cant reduction in system 1/f noise and CCD reset
    clock feed-through. In S/H mode the internal DC-
    restore voltage clamp can be enabled or disabled to
    support AC-coupled or DC inputs. Sampling mode,
    10-bit PGA gain (1024 linear steps), 8-bit fine offset
    adjustment (256 linear steps), 2-bit gross offset adjust-
    ment and input signal polarity are all programmable
    through a serial interface. PGA gain range is 1 to 10,
    and channel offset range is -300mV to 300mV for fine
    adjustment and additional -400mV to +200mV for
    gross offset adjustment. The A/D Full-Scale Range
    (FSR) is programmable to 2V or 3V.
    ORDERING INFORMATION
    Part No.
    Package Type
    Temperature Range
    XRD9814BCV
    48-Lead TQFP
    0°C to +70°C
    XRD9816BCV
    48-Lead TQFP
    0°C to +70°C
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