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參數(shù)資料
| 型號： | XRD64L43AIV-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 2/20頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 10B PAR 40MSPS DL 64LQFP |
| 標準包裝： | 160 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 40M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉換器數(shù)目： | 2 |
| 功率耗散（最大）： | 365mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應商設備封裝： | 64-LQFP（10x10） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 2 個單端，單極；2 個差分，單極 |
| 其它名稱： | 1016-1638 XRD64L43AIV-F-ND |
XRD64L43
Preliminary
10
Rev. P1.00
APPLICATION SECTION
VoltageReferences
ThetopladdervoltagefortheXRD64L43canbeprovided
fromaninternalbandgapreference. Thebandgapreference
anditsfeedbackpath,Pins1and2respectively, canbeused
to set the voltage for VRHF. Select Rf and Ri (if gain is
necessary) so that VRHF=VBG(1+Rf/Ri). The internal
bandgap voltage is 1.24 volts. The XRD64L43 has a low
impedenceladder,therefore,thetypicalvalueforRfandRi
is 10K (Rf and Ri are recommended to be greater than
5K).SeeFigure2.forasimplifieddiagram. Decouplingcaps
on the sense inputs to AGND should be used to reduce
injectioin of high-frequency noise.
VBG
Bandgap
VFBK
VRHF
XRD64L43
Rf
Ri
Resistive Ladder
VRLS
VRHS
VRLF
External voltage references can be forced at VRHF and
VRLF. If VRHF and VRLF are driven externally, VFBK
should be connected to AVdd, which tri-states the
bandgap reference. Direct inputs or inputs driven by
external amplifiers can be used to drive the ladder
reference voltages of the XRD64L43. See Figure 3. for
a simplified diagram. The sense inputs are intended for
sensingpurposesonlyandcaremustbetakentoinsurethat
no current flow be present in the sense lines.
Figure 2. Voltage Reference Generated from the
InternalBandgapVoltagew/gain
Figure 3. Voltage Reference Provided by an Ex-
ternal Source as Direct Inputs
VBG
Bandgap
VFBK
VRHF
VRLF
XRD64L43
Resistive Ladder
AVdd
VRLS
VRHS
Single-Ended Inputs
The XRD64L43 can be used in either single-ended or
differential input mode. For differential inputs, see the
Differential Inputs Section. Single-ended inputs mini-
mize the amount of external components necessary to
interface with the XRD64L43. The common inputs,
VINA(-) and VINB(-) should be tied to ground. VINA(+)
and VINB(+) can be used to apply direct inputs to the
XRD64L43. Figure 4. is a simplied diagram for single-
ended inputs. Pin 16, DIFF should be held low to select
single-ended inputs.
Figure 4. Single-Ended Inputs for the XRD64L43
Input A
Input B
50
VINA(+)
VINA(-)
VINB(+)
VINB(-)
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